Samsung 8-Bit CMOS Microcontroller, S3C9228/P9228 Port 1 Interrupt Control Register P1INT

S3C9228/P9228 I/O PORTS

Port 1 Interrupt Control Register (P1INT)

F1H, Page 0, R/W

MSB .7 .6 .5 .4 .3 .2 .1 .0

LSB

Not used	P1.3	P1.2	P1.1	P1.0
	(INT)	(INT)	(INT)	(INT)

P1INT bit configuration settings:

0Disable interrupt

1Enable interrupt

Figure 9-8. Port 1 Interrupt Control Register (P1INT)

Port 1 Interrupt Pending Bits (INTPND1.7-.4)

D6H, Page 0, R/W

MSB

.7

.6

.5

.4

.3

.2

.1

.0

LSB

P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0 (INT) (INT) (INT) (INT) (INT) (INT) (INT) (INT)

INTPND1 bit configuration settings:

0No interrupt pending (when read), clear pending bit (when write)

1Interrupt is pending (when read)

Figure 9-9. Port 1 Interrupt Pending Bits (INTPND1.7-.4)

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