Samsung S3C9228/P9228, 8-Bit CMOS Microcontroller user manual Watch Timer Control Register Wtcon

WATCH TIMER S3C9228/P9228

WATCH TIMER CONTROL REGISTER (WTCON)

The watch timer control register, WTCON is used to select the input clock source, the watch timer interrupt time and Buzzer signal, to enable or disable the watch timer function. It is located in page 0 at address DAH, and is read/write addressable using register addressing mode.

A reset clears WTCON to "00H". This disable the watch timer and select fx/128 as the watch timer clock. So, if you want to use the watch timer, you must write appropriate value to WTCON.

MSB

Watch Timer Control Register (WTCON)

DAH, R/W

.7 .6 .5 .4 .3 .2 .1 .0

LSB

Watch timer clock selection bit: 0 = Main clock divided by

27(fx/128)

1 = Sub clock (fxt)

Watch timer INT Enable/Disable bit: 0 = Disable watch timer INT

1 = Enable watch timer INT

Buzzer signal selection bits: 00 = 0.5 kHz

01 = 1 kHz

10 = 2 kHz

11 = 4 kHz

Not used

Watch timer Enable/Disable bit:

0 = Disable watch timer;

clear frequency dividing circuits 1 = Enable watch timer

Watch timer speed selection bits:

00 = Set watch timer interrupt to 1 s

01 = Set watch timer interrupt to 0.5 s

10 = Set watch timer interrupt to 0.25 s

11 = Set watch timer interrupt to 3.91 ms

Figure 12-1. Watch Timer Control Register (WTCON)

12-2