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TIMER 1 | S3C9228/P9228 |
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TWO 8-BIT TIMERS MODE (TIMER A and B)
OVERVIEW
The
Timer A and B have the following functional components:
—Clock frequency divider with multiplexer
–fxx divided by 512, 256, 64, 8 or 1, fxt, and T1CLK (External clock) for timer A
–fxx divided by 512, 256, 64, 8 or 1, and fxt for timer B
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—Timer A have I/O pin for match output (TAOUT)
—Timer A match interrupt generation
—Timer A control register, TACON (page 0, BBH, read/write)
—Timer B match interrupt generation
—Timer B control register, TBCON (page 0, BAH, read/write)
Timer A and B Control Register (TACON, TBCON)
You use the timer A and B control register, TACON and TBCON, to
—Enable the timer A (interval timer mode) and B operating (interval timer mode)
—Select the timer A and B input clock frequency
—Clear the timer A and B counter, TACNT and TBCNT
—Enable the timer A and B interrupt