S3C9228/P9228

A/D CONVERTER

 

 

Conversion Data Register ADDATAH/ADDATAL

D1H/D2H, Page 0, Read Only

MSB

.9

.8

.7

.6

.5

.4

.3

.2

 

 

 

 

 

 

 

 

 

LSB (ADDATAH)

MSB

-

-

-

-

-

-

.1

.0

LSB (ADDATAL)

Figure 14-2. A/D Converter Data Register (ADDATAH/ADDATAL)

INTERNAL REFERENCE VOLTAGE LEVELS

In the ADC function block, the analog input voltage level is compared to the reference voltage. The analog input level must remain within the range VSS to VDD.

Different reference voltage levels are generated internally along the resistor tree during the analog conversion process for each conversion step. The reference voltage level for the first conversion bit is always 1/2 VDD.

BLOCK DIAGRAM

 

 

 

 

ADCON.2-.1

 

 

ADCON.4-5

 

 

 

(Select one input pin of the assigned pins)

 

Clock

To ADCON.3

 

 

 

 

 

 

 

 

Selector

(EOC Flag)

 

 

ADCON.0

 

 

 

 

 

(AD/C Enable)

 

 

 

 

 

M

Analog

Successive

 

Input Pins

 

-

 

 

Comparator

 

 

Approximation

 

AD0-AD3

.

U

 

 

(P1.0-P1.3)

+

 

Logic & Register

 

 

.

X

 

 

 

 

.

 

 

 

 

 

ADCON.0

 

 

 

 

 

(AD/C Enable)

 

 

 

 

P1CON

 

 

 

 

(Assign Pins to ADC Input)

VDD

Conversion Result

 

 

 

10-bit D/A

 

 

 

 

(ADDATAH/ADDATAL,

 

 

 

Converter

 

 

 

 

VSS

D1H/D2H, Page 0)

 

 

 

 

 

Figure 14-3. A/D Converter Functional Block Diagram

14-3

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Image 427
Samsung 8-Bit CMOS Microcontroller, S3C9228/P9228 user manual Block Diagram