Samsung 8-Bit CMOS Microcontroller LDC/LDE Load Memory, LDC/LDE dst,src Operation dst ¨ src

S3C9228/P9228 SAM88RCRI INSTRUCTION SET

LDC/LDE — Load Memory

LDC/LDE dst,src

Operation: dst ¨ src

This instruction loads a byte from program or data memory into a working register or vice-versa. The source values are unaffected. LDC refers to program memory and LDE to data memory. The assembler makes Irr' orrr' values an even number for program memory and an odd number for data memory.

Flags: No flags are affected.

Format:

1.	opc	dst	src
2.	opc	src	dst
3.	opc	dst	src	XS
4.	opc	src	dst	XS
5.	opc	dst	src	XLL	XLH
6.	opc	src	dst	XLL	XLH
7.	opc	dst 0000		DAL	DAH
8.	opc	src 0000		DAL	DAH
9.	opc	dst 0001		DAL	DAH
10.	opc	src 0001		DAL	DAH

NOTES:

Bytes	Cycles	Opcode	Addr Mode
		(Hex)	dst	src
2	10	C3	r	Irr
2	10	D3	Irr	r
3	12	E7	r	XS [rr]
3	12	F7	XS [rr]	r
4	14	A7	r	XL [rr]
4	14	B7	XL [rr]	r
4	14	A7	r	DA
4	14	B7	DA	r
4	14	A7	r	DA
4	14	B7	DA	r

1.The source (src) or working register pair [rr] for formats 5 and 6 cannot use register pair 0–1.

2.For formats 3 and 4, the destination address 'XSrr]'[ and the source address 'XSrr]'[ are each one byte.

3.For formats 5 and 6, the destination address 'XLrr][ and the source address 'XLrr]'[ are each two bytes.

4.The DA and r source values for formats 7 and 8 are used to address program memory; the second set of values, used in formats 9 and 10, are used to address data memory.

6-29