Samsung S3C9228/P9228, 8-Bit CMOS Microcontroller INTPND2 Interrupt Pending Register, D7H

CONTROL REGISTERSS3C9228/P9228

INTPND2 — Interrupt Pending Register 2 D7H

Bit Identifier

RESET Value

Read/Write

.7-.6

.5

.7	.6	.5	.4	.3	.2	.1	.0
–	–	0	0	0	0	0	0
–	–	R/W	R/W	R/W	R/W	R/W	R/W

Not used for S3C9228/P9228

P3.1 (INTP) Interrupt Pending Bit

0No interrupt pending (when read), clear pending bit (when write)

1Interrupt is pending (when read)

.4 P3.0 (INTP) Interrupt Pending Bit

0No interrupt pending (when read), clear pending bit (when write)

1Interrupt is pending (when read)

.3 Watch Timer Interrupt Pending Bit

0No interrupt pending (when read), Clear pending bit (when write)

1Interrupt is pending (when read)

.2 SIO Interrupt Pending Bit

0No interrupt pending (when read), Clear pending bit (when write)

1Interrupt is pending (when read)

.1 Timer B Interrupt Pending Bit

0No interrupt pending (when read), Clear pending bit (when write)

1Interrupt is pending (when read)

.0 Timer 1/A Interrupt Pending Bit

0No interrupt pending (when read), Clear pending bit (when write)

1Interrupt is pending (when read)

NOTE: Refer to Page 5-6 to clear any pending bits.

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