Samsung S3C9228/P9228, 8-Bit CMOS Microcontroller Port 0 Interrupt Control Register P0INT

I/O PORTS S3C9228/P9228

MSB

Port 0 Control Register (P0CON)

EBH, Page 0, R/W

.7 .6 .5 .4 .3 .2 .1 .0

LSB

P0.3/BUZ	P0.2	P0.1/T1CLK	P0.0/TAOUT
(INT)	(INT)	(INT)	(INT)

P0CON bit-pair pin configuration settings:

00

01

10

11

Schmitt trigger input mode (T1CLK)

Push-pull output mode

N-channel open-drain output mode

Alternative function (TAOUT, BUZ)

Figure 9-2. Port 0 Control Register (P0CON)

Port 0 Interrupt Control Register (P0INT)

EDH, Page 0, R/W

MSB

.7

.6

.5

.4

.3

.2

.1

.0

LSB

Not used	P0.3	P0.2	P0.1	P0.0
	(INT)	(INT)	(INT)	(INT)

P0INT bit configuration settings:

0Disable interrupt

1Enable interrupt

Figure 9-3. Port 0 Interrupt Control Register (P0INT)

9-4