SOYO SY-5S manual Chipset Features Setup, Refresh Cycle Time

Models: SY-5S

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BIOS Setup Utility

SY-5STM

CHIPSET FEATURES SETUP

CHIPSET

FEATURES

Auto Configuration

L2 (WB) Tag Bit Length

SRAM Back-to- Back

NA# Enable

Starting Point of Paging

 

Setting

Description

Note

 

 

 

 

 

 

 

 

 

 

 

 

Disabled

 

 

 

 

Enabled

It is strongly recommended

Default

 

 

 

to enable this option so that

 

 

 

 

the system automatically

 

 

 

 

sets all chipset feature

 

 

 

 

options on the left panel of

 

 

 

 

the screen (except for cache

 

 

 

 

update & BIOS cacheable).

 

 

 

 

 

 

 

 

7bits

Use the default setting

Default

 

 

8bits

 

 

 

 

 

 

 

 

 

Disabled

 

 

 

 

Enabled

Use this default setting

Default

 

 

 

 

 

 

 

Disabled

 

 

 

 

Enabled

Use this default setting

Default

 

 

 

 

 

 

 

1T

Use this default setting

Default

 

 

2T,4T,8T

 

 

 

The following fields are READ-ONLY if [Auto Configuration] is set to [Enabled]

Refresh Cycle Time

15.6 Use the default setting Default

62.4

124.8

187.2

RAS Pulse Width Refresh

RAS Precharge Time

RAS to CAS

Delay

4T,5T

6T Use the default setting Default

7T

2T

3T Use the default setting Default 4T,5T

2T

3T Use the default setting Default 4T,5T

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Page 53
Image 53
SOYO SY-5S manual Chipset Features Setup, Refresh Cycle Time, RAS Pulse Width Refresh RAS Precharge Time RAS to CAS Delay