Technics MT5634SMI-92 manual SCR Scratch, DLL Divisor Latch LSByte, DLM Divisor Latch MSByte

Models: MT5634SMI-92 MT5634SMI-34

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SCR Scratch

Chapter 4 – SocketModem Parallel Interface – A Programmer’s Description

SCR Scratch

The host programmer uses this register for temporary data storage.

DLL Divisor Latch (LSByte)

This register contains low-order byte for the 16-bit clock divider. It is kept to maintain register set compatibility with the 16C550A interface. However, it is not used for clock generation since MMM does not require the generation of a real baud clock.

DLM Divisor Latch (MSByte)

This register contains high-order byte for the 16-bit clock divider. It is kept to maintain register set compatibility with the 16C550A interface. However, it is not used for clock generation, since MMM does not require the generation of a real baud clock.

Programming the Baud Rate Generator Registers DLM (MSB) and DLL (LSB) provides a user capability for selecting the desired final baud rate. The example in the Table below, shows the selectable baud rates available when using a 1.8432 MHz external clock input.

BAUD RATE GENERATOR PROGRAMMING TABLE

Baud Rate

16 x Clock Divisor (Decimal)

DLM Value (HEX)

DLL Value (HEX)

110

1047

04

17

300

384

01

80

600

192

00

C0

1200

96

00

60

2400

48

00

30

4800

24

00

18

9600

12

00

0C

19.2K

6

00

06

38.4K

3

00

03

57.6K

2

00

02

115.2K

1

00

01

SocketModem Global MT5634SMI Developer’s Guide

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Technics MT5634SMI-92, MT5634SMI-34 manual SCR Scratch, DLL Divisor Latch LSByte, DLM Divisor Latch MSByte