Appendix A: Specifications

CSA7000 Series, TDS7000 Series, & TDS6000 Series Instruments User Manual A-13

Table A- 2: Channel input and vertical specifications (Cont.)
Characteristic Description
Step response settling errors, typical Full bandwidth
CSA7404, CSA7154, TDS7404,
T
D
S
7
2
5
4
&
T
D
S
7
1
5
4
Full bandwidth
TDS7254, & TDS7154 SCALE range and step amplitude Settling error at time after step
2 mV/div to 99.5 mV/div,
with ≤1.5 V step
20 ns: ≤2%
1ms:≤0.1%
100 mV/div to 1 V/div,
with ≤3Vstep
20 ns: ≤2%
1ms:≤0.2%
TDS7104 & TDS7054 Bandwidth limit set to Full
SCALE range and step amplitude Settling error at time after step
1 mV/div to 100 mV/div,
with ≤2Vstep
20 ns: ≤0.5%
100 ns: ≤0.2%
20 ms: ≤0.1%
101 mV/div to 1 V/div,
with ≤20 V step
20 ns: ≤1.0%
100 ns: ≤0.5%
20 ms: ≤0.2%
1.01 V/div to 10 V/div,
with ≤200 V step
20 ns: ≤1.0%
100 ns: ≤0.5%
20 ms: ≤0.2%
TDS6604 & TDS6404 Full bandwidth
SCALE range and step amplitude Settling error at time after step
10 mV/div to 99.5 mV/div,
with ≤1.5 V step
20 ns: ≤2%
1ms:≤0.1%
100 mV/div to 1 V/div, with ≤3Vstep 20 ns: ≤2%
1ms:≤0.2%