Functional block diagram | Texas Instruments MSP430x11x1 specification

MSP430x11x1

MIXED SIGNAL MICROCONTROLLER

SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000

AVAILABLE OPTIONS

		PACKAGED DEVICES

	TA	PLASTIC	PLASTIC
	TA	20-PIN SOWB	20-PIN TSSOP
		20-PIN SOWB	20-PIN TSSOP
		(DW)	(PW)

		MSP430C1111IDW	MSP430F1101IPW
	±40°C to 85°C	MSP430C1121IDW	MSP430F1121IPW
	±40°C to 85°C	MSP430F1101IDW
		MSP430F1101IDW
		MSP430F1121IDW

functional block diagram

Rosc

XIN XOUT

VCC

VSS

RST/NMI

Oscillator

ACLK

1/2/4 KB ROM/

128/256B

Power-on-

System Clock

SMCLK

Flash+126/256B

Flash INFO

RAM

Reset

'C': ROM

'F': Flash

MCLK

		P1.0±7
		8
	Outx	I/O Port P1	JTAG
	CCIxA	I/O Port P1	JTAG
	CCIxA	8 I/O's, All With
	TACLK	8 I/O's, All With
	TACLK	Interrupt
	SMCLK	Interrupt
	SMCLK	Capabililty

MAB, 16 Bit

MAB, 4 Bit

CPU

Test

MCB

Incl. 16 Reg.

JTAG

MDB, 16 Bit

MDB, 8 Bit

Bus

Conv.

TEST

TACLK or

INCLK

Watchdog

Timer_A

INCLK

Comparator-A

I/O Port P2

²

CCI1

CCI1

Timer

3 CC

Input Multiplexer

6 I/O's All With

Register

Outx

RC Filtered O/P

Out0

Interrupt

ACLK

CCR0/1/2

CCIx

Internal Vref

Capabililty

ACLK

15/16 Bit

Analog Switch

DCOR

SMCLK

x = 0, 1, 2

CCIx

CCI0

	P2.0 / ACLK									P2.5 / Rosc

	P2.1 / INCLK							P2.4 / CA1/TA2

²	P2.2 / CAOUT/TA0							P2.3 / CA0/TA1

	A pulldown resistor of 30 kΩ is needed on F11x1.

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

Image 2

Texas Instruments MSP430x11x1 warranty Functional block diagram, Available Options Packaged Devices, PIN Sowb PIN Tssop

Contents

Tssop MSP430x11x1Description PIN Sowb PIN Tssop Functional block diagramAvailable Options Packaged Devices Pulldown resistor of 30 k Ω is needed on F11x1 Processing unit Terminal FunctionsShort-form description Terminal Description Name Instruction set Address Mode DescriptionsCPU Instruction Word Formats Low-power consumption capabilities Operation modes and interrupts SCG0 Status register R2SCG1 SCG1 SCG0 Wdtifg Interrupt vector addressesCaifg CCIFG1, CCIFG2, Taifg Ofifg Special function registersWdtifg Nmiifg Memory organization Boot ROM containing bootstrap loaderFunctions of the bootstrap loader WDT Features of the bootstrap loader areHardware resources used for serial input/output VCC RST/NMI PIN Test PIN Test Bootstrap loader StartsVCC Internal Flash memory Flash memory control register FCTL1 WRT Flash memory, timing generator, control register FCTL2Erase 0128h, bit1, Erase a segment SSEL0, SSEL1 Flash memory control register FCTL3FN0±FN5 Aclk Accvifg BusyKeyv Wait Emex Flash memory, interrupt and security key violationLock POR AccvPUC Nmirs Peripherals Oscillator and system clock Clock Signals Digital I/O Watchdog timer TimerA Three capture/compare registers TimerA 3 capture/compare registers TimerA, MSP430x11x1 Configuration ComparatorA CACTL2.4 CaoutCAF CATCTL2.7 Caex Caon Caies Caifg Rsel REF1 REF0 Slope a/d conversionCACTL1 CACTL2 Peripheral file map Peripherals with Word AccessPeripherals with Byte Access MIN NOM MAX Units Absolute maximum ratings²Recommended operating conditions MSP430x11x1 Devices Frequency vs Supply Voltage ILPM2 Parameter Test Conditions MIN TYP MAX UnitIAM ILPM3 Outputs Port 1 to P2 P1.0 to P1.7, P2.0 to P2.5 Leakage current Parameter Test Conditions VCC MIN TYP MAX Unit Internal signals TAx, Smclk at TimerAInputs Px.x, TAx Port P1, P2 P1.x to P2.x Outputs P1.x, P2.x, TAx ComparatorA see Note VRefVT vs Temperature, VCC = 3 V, C1121 VRefVT vs Temperature, VCC = 2.2 V, C1121 PUC/POR CAF Caon RAM Parameter MIN NOM MAX Unit Dcoclk DCOVariance Max DCO Steps JTAG/programming Principle characteristics of the DCOWake-up from lower power modes LPMx GND Input/output schematicPort P1, P1.0 to P1.3, input/output with Schmitt-trigger P1DIR.5 P1OUT.5 P1DIR.4 P1OUT.4 SmclkP1IFG.4 P1IES.4 P1IFG.5 P1IES.5 Port P2, P2.0 to P2.2, input/output with Schmitt-trigger CAPD.X P2IFG.3 P1IES.3 Port P2, P2.3 to P2.4, input/output with Schmitt-triggerP2DIR.3 P2OUT.3 P2DIR.4 P2OUT.4 P2OUT.5 P2SEL.5 VCCP2DIR.5 P2IRQ.5 Port P2, unbonded bits P2.6 and P2.7 Plastic SMALL-OUTLINE Package Pins DIM MAXDW R-PDSO-G PIN Shown PW R-PDSO-G Plastic SMALL-OUTLINE Package Pins ShownPins DIM MAX MIN 15 NOM Gage Plane Seating Plane 20 MAX Important Notice