MSP430x11x1
MIXED SIGNAL MICROCONTROLLER
SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000
APPLICATION INFORMATION
Port P1, P1.4 to P1.7, input/output with
P1SEL.x |
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0 |
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P1DIR.x |
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Direction Control | 1 |
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From Module | 0 | See Note 28 | |
P1OUT.x | Pad Logic | ||
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| 1 | P1.4±P1.7 | |
Module X OUT |
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| See Note 28 |
See Note 27
| GND |
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P1IN.x | Bus Keeper |
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Module X IN | D |
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| TST |
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| TEST |
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| P1IRQ.x | P1IE.x |
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| Interrupt |
| Fuse |
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| EN |
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| Q | Edge |
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| P1IFG.x | Set | Select |
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| GND |
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| Fuse |
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| Interrupt | P1IES.x | Control By JTAG |
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| P1SEL.x |
| Control | in F11x1 |
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| P1.x |
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| TDO |
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| Controlled By JTAG |
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| P1.7/TDI/TDO |
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| Controlled by JTAG |
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| TDI |
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| P1.6/TDI |
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NOTE: The test pin should be protected from potential EMI |
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and ESD voltage spikes. This may require a smaller | TMS |
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external pulldown resistor in some applications. |
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| P1.5/TMS |
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x = Bit identifier, 4 to 7 for port P1 |
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During programming activity and during blowing | TCK |
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the fuse, the pin TDO/TDI is used to apply the test |
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input for JTAG circuitry. |
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| P1.4/TCK |
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PnSel.x | PnDIR.x | control from | PnOUT.x | Module X OUT | PnIN.x | Module X IN |
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| PnIE.x | PnIFG.x | PnIES.x | |
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P1Sel.4 | P1DIR.4 | P1DIR.4 | P1OUT.4 | SMCLK | P1IN.4 | unused |
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| P1IE.4 | P1IFG.4 | P1IES.4 | |
P1Sel.5 | P1DIR.5 | P1DIR.5 | P1OUT.5 | Out0 signal² | P1IN.5 | unused |
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| P1IE.5 | P1IFG.5 | P1IES.5 | |
P1Sel.6 | P1DIR.6 | P1DIR.6 | P1OUT.6 | Out1 signal² | P1IN.6 | unused |
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| P1IE.6 | P1IFG.6 | P1IES.6 | |
P1Sel.7 | P1DIR.7 | P1DIR.7 | P1OUT.7 | Out2 signal² | P1IN.7 | unused |
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| P1IE.7 | P1IFG.7 | P1IES.7 | |
² Signal from or to Timer_A
NOTES: 27. Optional selection of pullup or pulldown resistors with ROM (masked) versions.
28. Fuses for optional pullup and pulldown resistors can only be programmed at the factory (ROM versions only).
38 | POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
