MSP430x11x1
MIXED SIGNAL MICROCONTROLLER
SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000
electrical characteristics over recommended ranges of supply voltage and operating
principle characteristics of the DCO
DIndividual devices have a minimum and maximum operation frequency. The specified parameters for fDCOx0 to fDCOx7 are valid for all devices.
DThe DCO control bits DCO0, DCO1 and DCO2 have a step size as defined in parameter SDCO.
DThe modulation control bits MOD0 to MOD4 select how often fDCO+1 is used within the period of 32 DCOCLK cycles. fDCO is used for the remaining cycles. The frequency is an average = fDCO ⋅ (2MOD/32).
DThe ranges selected by RSel4 to RSel5, RSel5 to RSel6, and RSel6 to RSel7 are overlapping.
wake-up from lower power modes (LPMx)
| PARAMETER | TEST CONDITIONS | MIN TYP MAX | UNIT | |
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t(LPM0) |
| VCC = 2.2 V/3 V |
| 100 | ns |
t(LPM2) |
| VCC = 2.2 V/3 V |
| 100 | |
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| f(MCLK) = 1 MHz, | VCC = 2.2 V/3 V | 6 |
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t(LPM3) | Delay time (see Note 22) | f(MCLK) = 2 MHz, | VCC = 2.2 V/3 V | 6 | ∝s |
| f(MCLK) = 3 MHz, | VCC = 2.2 V/3 V | 6 |
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| f(MCLK) = 1 MHz, | VCC = 2.2 V/3 V | 6 |
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t(LPM4) |
| f(MCLK) = 2 MHz, | VCC = 2.2 V/3 V | 6 | ∝s |
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| f(MCLK) = 3 MHz, | VCC = 2.2 V/3 V | 6 |
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NOTE 22: Parameter applicable only if DCOCLK is used for MCLK.
JTAG/programming
PARAMETER | TEST CONDITIONS |
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f(TCK) | TCK frequency, JTAG/test (see Note 25) | VCC = 2.2 V | dc |
| 5 | MHz |
VCC = 3 V | dc |
| 10 | |||
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V(FB) | Fuse blow voltage, C versions (see Notes 23 and 24) | VCC = 2.2 V/3 V | 3.5 |
| 3.9 | V |
I(FB) | Supply current on TDI during fuse blow (see Note 24) (C11x1) |
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| 100 | mA | |
t(FB) | Time to blow the fuse (see Note 24) (C11x1) |
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| 1 | ms |
Current during program cycle (see Note 26) | VCC = 2.7 V/3.6 V, |
| 3 | 5 | mA | |
MSP430F11x1 |
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| Current during erase cycle (see Note 26) | VCC = 2.7 V/3.6 V, |
| 3 | 5 | mA |
MSP430F11x1 |
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t(retention) | Write/erase cycles | MSP430F11x1 | 104 | 105 |
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Data retention TJ = 25°C | MSP430F11x1 | 100 |
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NOTES: 23. The power source to blow the fuse is applied to TDI pin.
24.Once the JTAG fuse is blown, no further access to the MSP430 JTAG/test feature is possible. The JTAG block is switched to bypass mode.
25.f(TCK) may be restricted to meet the timing requirements of the module selected.
26.Duration of the program/erase cycle is determined by f(FTG) applied to the flash timing controller. It can be calculated as follows:
t(word write) = 35 x 1/f(FTG)
t(segment write, byte 0) = 30 ⋅ 1/f(FTG)
t(segment write, byte 1 ± 63) = 20 ⋅ 1/f(FTG) t(mass erase) = 5297 x 1/f(FTG)
t(page erase) = 4819 x 1/f(FTG)
36 | POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
