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Texas Instruments MSP430x11x1 warranty flash memory, interrupt and security key violation, Lock

Models: MSP430x11x1

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MSP430x11x1

MIXED SIGNAL MICROCONTROLLER

SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000

flash memory control register FCTL3 (continued)

LOCK	012Ch, bit4,	The lock bit may be set during any write, segment-erase, or mass-erase request.
		Any active sequence in progress is completed normally. In segment-write mode,
		the SEGWRT bit is reset and the WAIT bit is set after the mode ends. The lock
		bit is controlled by software or hardware. If an access violation occurs and the
		ACCVIFG is set, the LOCK bit is set automatically.
		0: Flash memory may be read, programmed, erased, or mass erased.
		1: Flash memory may be read but not programmed, erased, or mass erased.
		A current program, erase, or mass-erase operation will complete normally.
		The access-violation interrupt flag ACCVIFG is set when data are written to
		the flash memory module while the lock bit is set.
EMEX,	012Ch, bit5,	Emergency exit. The emergency exit should only be used if the flash memory
		write or erase operation is out of control.
		0: No function.
		1: Stops the active operation immediately, and shuts down all internal parts in
		the flash memory controller. Current consumption immediately drops back
		to the active mode. All bits in control register FCTL1 are reset. Since the
		EMEX bit is automatically reset by hardware, the software always reads
		EMEX as 0.

flash memory, interrupt and security key violation

One NMI vector is used for three NMI events: RST/NMI (NMIIFG), oscillator fault (OFIFG), and flash-memory access violation (ACCVIFG). The software can determine the source of the interrupt request since all flags remain set until they are reset by software. The enable flag(s) should be set simultaneously with one instruction before the return-from-interrupt RETI instruction. This ensures that the stack remains under control. A pending NMI interrupt request will not increase stack demand unnecessarily.

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Texas Instruments flash memory, interrupt and security key violation, MSP430x11x1 MIXED SIGNAL MICROCONTROLLER, Lock

Contents

MIXED SIGNAL MICROCONTROLLER D Ultralow-Power ConsumptionD Five Power Saving Modes Standby Mode 0.8 ∝AMSP430x11x1 MIXED SIGNAL MICROCONTROLLER functional block diagramTerminal Functions short-form descriptionprocessing unit MIXED SIGNAL MICROCONTROLLERTable 2. Address Mode Descriptions short-form description continuedinstruction set Table 1. Instruction Word Formatslow-power consumption capabilities operation modes and interruptsinstruction set continued MSP430x11x1 MIXED SIGNAL MICROCONTROLLERstatus register R2 MSP430x11x1 MIXED SIGNAL MICROCONTROLLERinterrupt vector addresses MSP430x11x1 MIXED SIGNAL MICROCONTROLLERINTERRUPT SOURCE INTERRUPT FLAGinterrupt enable 1 and Reset on VCC power-on or reset condition atFlag set on oscillator fault special function registersboot ROM containing bootstrap loader functions of the bootstrap loadermemory organization MSP430x11x1 MIXED SIGNAL MICROCONTROLLERboot ROM containing bootstrap loader continued features of the bootstrap loader arehardware resources used for serial input/output MSP430x11x1 MIXED SIGNAL MICROCONTROLLERboot ROM containing bootstrap loader continued MSP430x11x1 MIXED SIGNAL MICROCONTROLLERD There were less than two positive edges at TEST while RST/NMI is low flash memory control register FCTL1 flash memoryMSP430x11x1 MIXED SIGNAL MICROCONTROLLER flash memory, timing generator, control register FCTL2 flash memory control register FCTL1 continuedErase 0128h, bit1, Erase a segmentFigure 1. Flash Memory Timing Generator Diagram flash memory, timing generator, control register FCTL2 continuedflash memory control register FCTL3 MSP430x11x1 MIXED SIGNAL MICROCONTROLLERflash memory control register FCTL3 continued MIXED SIGNAL MICROCONTROLLERMSP430x11x1 BUSYflash memory, interrupt and security key violation MSP430x11x1 MIXED SIGNAL MICROCONTROLLERflash memory control register FCTL3 continued LOCKFigure 2. Block Diagram of NMI Interrupt Sources MSP430x11x1 MIXED SIGNAL MICROCONTROLLERFlash Module IFG1.4oscillator and system clock peripheralsMSP430x11x1 MIXED SIGNAL MICROCONTROLLER Figure 3. Clock Signals oscillator and system clock continueddigital I/O MSP430x11x1 MIXED SIGNAL MICROCONTROLLERwatchdog timer TimerA Three capture/compare registersdigital I/O continued MSP430x11x1 MIXED SIGNAL MICROCONTROLLERTimerA 3 capture/compare registers continued Figure 4. TimerA, MSP430x11x1 ConfigurationUART MSP430x11x1 MIXED SIGNAL MICROCONTROLLERComparatorA Figure 5. Block Diagram of ComparatorAMSP430x11x1 MIXED SIGNAL MICROCONTROLLER MIXED SIGNAL MICROCONTROLLER ComparatorA continuedMSP430x11x1 slope a/d conversion MSP430x11x1 MIXED SIGNAL MICROCONTROLLERComparatorA continued The ComparatorA is well suited for use in single or multiple-slope conversions. The internal-reference levels may be used to set a reference during timing measurement of charge or discharge operations. They can also be used externally to bias analog circuitryperipheral file map MSP430x11x1 MIXED SIGNAL MICROCONTROLLERabsolute maximum ratings² recommended operating conditionsMSP430x11x1 MIXED SIGNAL MICROCONTROLLER Storage temperature, T stg unprogrammed devicerecommended operating conditions continued MSP430x11x1 DevicesFigure 6. Frequency vs Supply Voltage MSP430x11x1 MIXED SIGNAL MICROCONTROLLERcurrent consumption of active mode versus supply voltage, C version current consumption of active mode versus supply voltage, F versionsupply current into VCC excluding external current fsystem = 1 MHz MSP430x11x1 MIXED SIGNAL MICROCONTROLLERSchmitt-trigger inputs Port P1 to Port P2 P1.0 to P1.7, P2.0 to P2.5 outputs Port 1 to P2 P1.0 to P1.7, P2.0 to P2.5leakage current MSP430x11x1 MIXED SIGNAL MICROCONTROLLERinternal signals TAx, SMCLK at TimerA optional resistors, individually programmable with ROM code see Noteinputs Px.x, TAx MSP430x11x1 MIXED SIGNAL MICROCONTROLLERoutputs P1.x, P2.x, TAx ComparatorA see NoteMSP430x11x1 MIXED SIGNAL MICROCONTROLLER t res ponse HLFigure 8. VRefVT vs Temperature, VCC = 2.2 V, C1121 Figure 7. VRefVT vs Temperature, VCC = 3 V, C1121MSP430x11x1 MIXED SIGNAL MICROCONTROLLER Figure 9. Block Diagram of ComparatorA Module Figure 10. Overdrive Definition PUC/PORMSP430x11x1 MIXED SIGNAL MICROCONTROLLER τ ≈ 2.0 ∝ sFigure 12. VPOR vs Temperature crystal oscillator,LFXT1 Figure 11. Power-On Reset POR vs Supply VoltageMSP430x11x1 MIXED SIGNAL MICROCONTROLLER Figure 13. DCO Characteristics MSP430x11x1 MIXED SIGNAL MICROCONTROLLERfDCOx7 fDCOx0principle characteristics of the DCO wake-up from lower power modes LPMxJTAG/programming MSP430x11x1 MIXED SIGNAL MICROCONTROLLERPort P1, P1.0 to P1.3, input/output with Schmitt-trigger APPLICATION INFORMATION input/output schematicMSP430x11x1 MIXED SIGNAL MICROCONTROLLER APPLICATION INFORMATION MSP430x11x1 MIXED SIGNAL MICROCONTROLLERMSP430x11x1 Port P2, P2.0 to P2.2, input/output with Schmitt-triggerMIXED SIGNAL MICROCONTROLLER APPLICATION INFORMATIONPort P2, P2.3 to P2.4, input/output with Schmitt-trigger MSP430x11x1 MIXED SIGNAL MICROCONTROLLERAPPLICATION INFORMATION APPLICATION INFORMATIONMSP430x11x1 MIXED SIGNAL MICROCONTROLLER Port P2, unbonded bits P2.6 and P2.7 MSP430x11x1 MIXED SIGNAL MICROCONTROLLERJTAG fuse check mode APPLICATION INFORMATIONMECHANICAL DATA DW R-PDSO-GPLASTIC SMALL-OUTLINE PACKAGE MSP430x11x1 MIXED SIGNAL MICROCONTROLLERPW R-PDSO-G PLASTIC SMALL-OUTLINE PACKAGEMSP430x11x1 MIXED SIGNAL MICROCONTROLLER MECHANICAL DATAIMPORTANT NOTICE