MSP430x11x1

MIXED SIGNAL MICROCONTROLLER

SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000

special function registers

Most interrupt and module enable bits are collected into the lowest address space. Special function register bits that are not allocated to a functional purpose are not physically present in the device. Simple software access is provided with this arrangement.

interrupt enable 1 and 2

Address

0h

WDTIE:

OFIE:

NMIIE:

ACCVIE:

Address

01h

7

6

5

4

3

2

1

0

 

 

ACCVIE

NMIIE

 

 

OFIE

WDTIE

 

 

 

 

 

 

 

 

 

 

rw-0

rw-0

 

 

rw-0

rw-0

Watchdog timer enable signal

Oscillator fault enable signal

Nonmaskable interrupt enable signal

Access violation at flash memory

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

interrupt flag register 1 and 2

Address

02h

7

6

5

4

3

2

1

0

 

 

 

NMIIFG

 

 

OFIFG

WDTIFG

 

 

 

 

 

 

 

 

 

 

 

rw-0

 

 

rw-1

rw-0

WDTIFG:

Set on overflow or security key violation or

 

 

 

 

 

 

 

 

Reset on VCC power-on or reset condition at

RST/NMI-pin

 

 

 

OFIFG:

Flag set on oscillator fault

 

 

 

 

 

 

 

 

 

NMIIFG:

Set via

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RST/NMI-pin

 

 

 

 

 

 

 

 

 

 

 

Address

7

6

 

5

 

4

 

 

3

 

2

1

0

03h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Legend

rw:

Bit can be read and written.

 

 

 

 

 

 

 

 

 

 

rw-0:

Bit can be read and written. It is reset by PUC

 

 

 

 

 

 

 

 

SFR bit is not present in device.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Texas Instruments MSP430x11x1 warranty Special function registers, Wdtifg, Ofifg, Nmiifg
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