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Texas Instruments
TMS320C64X
manual
Literature Number SPRUEB8 February
Models:
TMS320C64X
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Install
Minimum Energy Error Search
Weight
How to
Dsplib Software Updates
Features and Benefits
Using Dsplib
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TMS320C64x+ DSP
Little-Endian
DSP Library
Programmer’s Reference
Literature Number: SPRUEB8
February 2006
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Contents
Literature Number SPRUEB8 February
Copyright 2006, Texas Instruments Incorporated
Read This First
Trademarks
Contents
Defines terms and abbreviations used in this book
Tables
Page
Introduction
FFT
Introduction to the TI C64x+ Dsplib
Introduction
Features and Benefits
Installing and Using Dsplib
Setenv Cdir installdir/libinstalldir/include $CDIR
How to Install Dsplib
−1. Dsplib Data Types
Using Dsplib
Calling a Dsplib Function From C
Interrupt Behavior of Dsplib Functions
How to Rebuild Dsplib
Page
Dsplib Function Tables
−1. Argument Conventions
Arguments and Conventions Used
Dsplib Functions
−2. Adaptive Filtering
Dsplib Function Tables
−3. Correlation
−4. FFT
−5. Filtering and Convolution
−7. Matrix
−6. Math
−9. Obsolete Functions
−8. Miscellaneous
−10. Functions Optimized in the C64x+ Dsplib
Differences Between the C64x and C64x+ DSPLIBs
DSPfircplxhM4X4
DSPblkeswap16 DSPblkeswap32 DSPblkmove
Dsplib Reference
DSPfirlms2
Adaptive Filtering
Benchmarks
DSPautocor
Correlation
AutoCorrelation
Cycles Nx40 Nr*nr/4 + Nx=40 Nx*nr/8 + 2*nr + Codesize Bytes
DSPautocorrA8 AutoCorrelation
Cycles Nx40 Nr+ Nx=40 Nx*nr/8 + 2*nr + Codesize Bytes
DSPfft16x16
FFT
Complex Forward Mixed Radix 16 x 16-bit FFT
Implementation Notes
Cycles Nx/8 + 19 * ceillog 4nx − 1 + 8*nx/8 + Codesize Bytes
DSPfft16x16imre
DSPfft16x16imre
Cycles Nx/8 + 19 * ceillog4nx − 1 + 8*nx/8 + Codesize Bytes
Complex Forward Mixed Radix 16 x 16-bit FFT With Rounding
DSPfft16x16r
DSPfft16x16r
Is equivalent to
FFT with one function call invocation as shown below
DSPfft16x16r
DSPfft16x16r
DSPfft16x16r
DSPfft16x16r
Special Requirements
Bank Conflicts No bank conflicts occur
Complex Forward Mixed Radix 16 x 32-bit FFT With Rounding
DSPfft16x32
DSPfft16x32
Complex Forward Mixed Radix 32 x 32-bit FFT With Rounding
DSPfft32x32
DSPfft32x32
Complex Forward Mixed Radix 32 x 32-bit FFT With Scaling
DSPfft32x32s
Preventing overflow
Complex Inverse Mixed Radix 16 x 16-bit FFT With Rounding
DSPifft16x16
DSPifft16x16
DSPifft16x16imre
DSPifft16x16imre
Complex Inverse Mixed Radix 16 x 32-bit FFT With Rounding
DSPifft16x32
DSPifft16x32
Complex Inverse Mixed Radix 32 x 32-bit FFT With Rounding
DSPifft32x32
DSPifft32x32
DSPfircplx
Filtering and Convolution
Complex FIR Filter
Both inner and outer loops are collapsed in one loop
DSPfircplxhM4X4 Complex FIR Filter
Interruptibility The code is fully interruptible
FIR Filter
DSPfirgen
A single clock cycle
DSPfirgenhM17rA8X8
Cycles 3*ceilnh/4*nr/4+39
DSPfirr4
FIR Filter when the number of coefficients is a multiple
Values in a single clock cycle
DSPfirr8
Output samples
DSPfirr8hM16rM8A8X8
Special Requirements
Symmetric FIR Filter
DSPfirsym
Inner loop is unrolled eight times
IIR With 5 Coefficients
DSPiir
4 into the r1 array
All-Pole IIR Lattice Filter
DSPiirlat
Cycles Nk + 7 * nx + Without bank conflicts Codesize Bytes
DSPdotpsqr
Math
Vector Dot Product and Square
Cycles Nx/2 + Codesize 128
Vector Dot Product
DSPdotprod
Cycles Nx / 4 + Codesize Bytes
Maximum Value of Vector
DSPmaxval
DSPmaxidx
Index of Maximum Element of Vector
Global maximum is then found from the list of maximums
DSPminval
Minimum Value of Vector
Bit Vector Multiply
DSPmul32
Intermediate results
Bit Vector Negate
DSPneg32
DSPrecip16
Bit Reciprocal
Special Requirements None Implementation Notes
DSPvecsumsq
Sum of Squares
DSPwvec
Weighted Vector Sum
Matrix Multiplication
Matrix
DSPmatmul
DSPmatmul
DSPmattrans
Matrix Transpose
DSPbexp
Miscellaneous
Block Exponent Implementation
Cycles Nx/2 + Codesize Bytes
DSPblkeswap16 Endian-Swap a Block of 16-Bit Values
DSPblkeswap16
Operation occurs in-place
DSPblkeswap32 Endian-Swap a Block of 32-Bit Values
DSPblkeswap32
A multiple of 4 words must be processed
DSPblkeswap64 Endian-Swap a Block of 64-Bit Values
DSPblkeswap64
Cycles Nx/2 + Codesize Bytes
Block Move Overlapping
DSPblkmove
DSPfltoq15
Float to Q15 Conversion
Cycles Nx/2 + Codesize Bytes
DSPminerror
Minimum Energy Error Search
Inner loop is completely unrolled
DSPq15tofl
Q15 to Float Conversion
DSPbitrevcplx
Obsolete Functions
Complex Bit-Reverse
DSPbitrevcplx
If txi3 = xj3 Xj3 =
Complex Forward FFT radix
DSPradix2
Bank Conflicts See Benchmarks
DSPr4fft
DSPr4fft
X2 * i3 + 1 = s2 * co3−r2 * si315 Ie =
Complex Forward FFT With Digital Reversal
DSPfft
DSPfft
100
C64x+ Dsplib Reference 101
102
C64x+ Dsplib Reference 103
104
C64x+ Dsplib Reference 105
Loads input x and coefficient w as double words
DSPfft16x16t
Complex Forward Mixed Radix 16- x 16-Bit FFT With Truncation
108
C64x+ Dsplib Reference 109
110
C64x+ Dsplib Reference 111
112
C64x+ Dsplib Reference 113
Y3 = y2 + int npoints L1 = norm + J0 = N0 = npoints1
Is either by 4, or
116
C64x+ Dsplib Reference 117
LogN
C64x+ Dsplib Reference 119
+ jY C + j S = XC + YS + j YC − XS
Performance/Fractional Q Formats
Performance Considerations
Table A−1. Q3.12 Bit Fields
Fractional Q Formats
Table A−2. Q.15 Bit Fields
Table A−4. Q.31 High Memory Location Bit Fields
Table A−3. Q.31 Low Memory Location Bit Fields
Software Updates and Customer Support
Dsplib Customer Support
Dsplib Software Updates
Glossary
BSL See board support library
CSL See chip support library
DSPblkmove Block move
FFT See fast fourier transform
HPI See host port interface see also HPI module
Law companding See compress and expand compand
Glossary
Rtos Real-time operating system
Page
Index
Index
Adaptive filtering
Peripheral, defined C-8
