Texas Instruments TMS320C64X manual DSPmul32, Bit Vector Multiply

DSP_mul32

DSP_mul32	32-Bit Vector Multiply
Function
		void DSP_mul32(const int * restrict x, const int * restrict y, int * restrict r, short
		nx)
Arguments		x[nx]	Pointer to input data vector 1 of size nx. Must be double-word
			aligned.
		y[nx]	Pointer to input data vector 2 of size nx. Must be double-word
			aligned.
		r[nx]	Pointer to output data vector of size nx. Must be double-word
			aligned.
		nx	Number of elements in input and output vectors. Must be multiple
			of 8 and ≥16.
Description		The function performs a Q.31 x Q.31 multiply and returns the upper 32 bits of
		the result. The result of the intermediate multiplies are accumulated into a
		40-bit long register pair, as there could be potential overflow. The contribution
		of the multiplication of the two lower 16-bit halves are not considered. The
		output is in Q.30 format. Results are accurate to least significant bit.
Algorithm		In the comments below, X and Y are the two input values. Xhigh and Xlow
		represent the upper and lower 16 bits of X. This is the C equivalent of the
		assembly code without restrictions. Note that the assembly code is hand
		optimized and restrictions may apply.
		void DSP_mul32(const int *x, const int *y, int *r,
		short nx)
	{
		short	i;
		int	a,b,c,d,e;

for(i=nx;i>0;i−−)

{

a=*(x++);

b=*(y++);

c=_mpyluhs(a,b); /* Xlow*Yhigh */ d=_mpyhslu(a,b); /* Xhigh*Ylow */ e=_mpyh(a,b); /* Xhigh*Yhigh */

d+=c;	/* Xhigh*Ylow+Xlow*Yhigh */
d=d>>16;	/* (Xhigh*Ylow+Xlow*Yhigh)>>16 */

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