DSP_minerror

Special Requirements Array GSP0_TABLE[] must be double-word aligned.

Implementation Notes

 

- Bank Conflicts: No bank conflicts occur.

 

- Interruptibility: The code is interrupt-tolerant but not interruptible.

 

- The load double-word instruction is used to simultaneously load four

 

values in a single clock cycle.

 

- The inner loop is completely unrolled.

 

- The outer loop is 4 times unrolled.

Benchmarks

Cycles

256/4 * 9 + 17 = 593

 

Codesize

352 bytes

4-88

Page 116
Image 116
Texas Instruments TMS320C64X manual Inner loop is completely unrolled