Performance Considerations
A.1 Performance Considerations
The ceil( ) is used in some benchmark formulas to accurately describe the number of cycles. It returns a number rounded up, away from zero, to the nearest integer. For example, ceil(1.1) returns 2.
Although DSPLIB can be used as a first estimation of processor performance for a specific function, you should be aware that the generic nature of DSPLIB might add extra cycles not required for customer specific usage.
Benchmark cycles presented assume best case conditions, typically assuming all code and data are placed in L1 memory. Any extra cycles due to placement of code or data in L2/external memory or
You should also be aware that execution speed in a system is dependent on where the different sections of program and data are located in memory. You should account for such differences when trying to explain why a routine is taking more time than the reported DSPLIB benchmarks.
For more information on additional stall cycles due to memory hierarchy, see the Signal Processing Examples Using TMS320C64x Digital Signal Processing Library (SPRA884). The TMS320C6000 DSP Cache User’s Guide (SPRU656A) presents how to optimize algorithms and function calls for better cache performance.
