Manuals
/
Texas Instruments
/
Photography
/
Security Camera
Texas Instruments
TMS320C64X
manual
Models:
TMS320C64X
1
8
169
169
Download
169 pages
59.58 Kb
5
6
7
8
9
10
11
12
<
>
Install
Minimum Energy Error Search
Weight
How to
Dsplib Software Updates
Features and Benefits
Using Dsplib
Page 8
Image 8
vi
Page 7
Page 9
Page 8
Image 8
Page 7
Page 9
Contents
Literature Number SPRUEB8 February
Copyright 2006, Texas Instruments Incorporated
Read This First
Trademarks
Contents
Defines terms and abbreviations used in this book
Tables
Page
Introduction
Introduction to the TI C64x+ Dsplib
FFT
Introduction
Features and Benefits
Installing and Using Dsplib
How to Install Dsplib
Setenv Cdir installdir/libinstalldir/include $CDIR
Using Dsplib
−1. Dsplib Data Types
Calling a Dsplib Function From C
How to Rebuild Dsplib
Interrupt Behavior of Dsplib Functions
Page
Dsplib Function Tables
Arguments and Conventions Used
−1. Argument Conventions
Dsplib Functions
Dsplib Function Tables
−2. Adaptive Filtering
−3. Correlation
−4. FFT
−5. Filtering and Convolution
−6. Math
−7. Matrix
−8. Miscellaneous
−9. Obsolete Functions
Differences Between the C64x and C64x+ DSPLIBs
−10. Functions Optimized in the C64x+ Dsplib
DSPfircplxhM4X4
DSPblkeswap16 DSPblkeswap32 DSPblkmove
Dsplib Reference
Adaptive Filtering
DSPfirlms2
Benchmarks
AutoCorrelation
Correlation
DSPautocor
Cycles Nx40 Nr*nr/4 + Nx=40 Nx*nr/8 + 2*nr + Codesize Bytes
DSPautocorrA8 AutoCorrelation
Cycles Nx40 Nr+ Nx=40 Nx*nr/8 + 2*nr + Codesize Bytes
Complex Forward Mixed Radix 16 x 16-bit FFT
FFT
DSPfft16x16
Implementation Notes
Cycles Nx/8 + 19 * ceillog 4nx − 1 + 8*nx/8 + Codesize Bytes
DSPfft16x16imre
DSPfft16x16imre
Cycles Nx/8 + 19 * ceillog4nx − 1 + 8*nx/8 + Codesize Bytes
DSPfft16x16r
Complex Forward Mixed Radix 16 x 16-bit FFT With Rounding
DSPfft16x16r
Is equivalent to
FFT with one function call invocation as shown below
DSPfft16x16r
DSPfft16x16r
DSPfft16x16r
DSPfft16x16r
Special Requirements
Bank Conflicts No bank conflicts occur
DSPfft16x32
Complex Forward Mixed Radix 16 x 32-bit FFT With Rounding
DSPfft16x32
DSPfft32x32
Complex Forward Mixed Radix 32 x 32-bit FFT With Rounding
DSPfft32x32
DSPfft32x32s
Complex Forward Mixed Radix 32 x 32-bit FFT With Scaling
Preventing overflow
DSPifft16x16
Complex Inverse Mixed Radix 16 x 16-bit FFT With Rounding
DSPifft16x16
DSPifft16x16imre
DSPifft16x16imre
DSPifft16x32
Complex Inverse Mixed Radix 16 x 32-bit FFT With Rounding
DSPifft16x32
DSPifft32x32
Complex Inverse Mixed Radix 32 x 32-bit FFT With Rounding
DSPifft32x32
Complex FIR Filter
Filtering and Convolution
DSPfircplx
Both inner and outer loops are collapsed in one loop
DSPfircplxhM4X4 Complex FIR Filter
Interruptibility The code is fully interruptible
DSPfirgen
FIR Filter
A single clock cycle
DSPfirgenhM17rA8X8
Cycles 3*ceilnh/4*nr/4+39
FIR Filter when the number of coefficients is a multiple
DSPfirr4
Values in a single clock cycle
DSPfirr8
Output samples
DSPfirr8hM16rM8A8X8
Special Requirements
DSPfirsym
Symmetric FIR Filter
Inner loop is unrolled eight times
DSPiir
IIR With 5 Coefficients
4 into the r1 array
DSPiirlat
All-Pole IIR Lattice Filter
Cycles Nk + 7 * nx + Without bank conflicts Codesize Bytes
Vector Dot Product and Square
Math
DSPdotpsqr
Cycles Nx/2 + Codesize 128
DSPdotprod
Vector Dot Product
Cycles Nx / 4 + Codesize Bytes
DSPmaxval
Maximum Value of Vector
Index of Maximum Element of Vector
DSPmaxidx
Global maximum is then found from the list of maximums
Minimum Value of Vector
DSPminval
DSPmul32
Bit Vector Multiply
Intermediate results
DSPneg32
Bit Vector Negate
Bit Reciprocal
DSPrecip16
Special Requirements None Implementation Notes
Sum of Squares
DSPvecsumsq
Weighted Vector Sum
DSPwvec
DSPmatmul
Matrix
Matrix Multiplication
DSPmatmul
Matrix Transpose
DSPmattrans
Block Exponent Implementation
Miscellaneous
DSPbexp
Cycles Nx/2 + Codesize Bytes
DSPblkeswap16
DSPblkeswap16 Endian-Swap a Block of 16-Bit Values
Operation occurs in-place
DSPblkeswap32
DSPblkeswap32 Endian-Swap a Block of 32-Bit Values
A multiple of 4 words must be processed
DSPblkeswap64
DSPblkeswap64 Endian-Swap a Block of 64-Bit Values
Cycles Nx/2 + Codesize Bytes
DSPblkmove
Block Move Overlapping
Float to Q15 Conversion
DSPfltoq15
Cycles Nx/2 + Codesize Bytes
Minimum Energy Error Search
DSPminerror
Inner loop is completely unrolled
Q15 to Float Conversion
DSPq15tofl
Complex Bit-Reverse
Obsolete Functions
DSPbitrevcplx
DSPbitrevcplx
If txi3 = xj3 Xj3 =
DSPradix2
Complex Forward FFT radix
Bank Conflicts See Benchmarks
DSPr4fft
DSPr4fft
X2 * i3 + 1 = s2 * co3−r2 * si315 Ie =
DSPfft
Complex Forward FFT With Digital Reversal
DSPfft
100
C64x+ Dsplib Reference 101
102
C64x+ Dsplib Reference 103
104
C64x+ Dsplib Reference 105
Loads input x and coefficient w as double words
Complex Forward Mixed Radix 16- x 16-Bit FFT With Truncation
DSPfft16x16t
108
C64x+ Dsplib Reference 109
110
C64x+ Dsplib Reference 111
112
C64x+ Dsplib Reference 113
Y3 = y2 + int npoints L1 = norm + J0 = N0 = npoints1
Is either by 4, or
116
C64x+ Dsplib Reference 117
LogN
C64x+ Dsplib Reference 119
+ jY C + j S = XC + YS + j YC − XS
Performance/Fractional Q Formats
Performance Considerations
Table A−2. Q.15 Bit Fields
Fractional Q Formats
Table A−1. Q3.12 Bit Fields
Table A−3. Q.31 Low Memory Location Bit Fields
Table A−4. Q.31 High Memory Location Bit Fields
Software Updates and Customer Support
Dsplib Software Updates
Dsplib Customer Support
Glossary
BSL See board support library
CSL See chip support library
DSPblkmove Block move
FFT See fast fourier transform
HPI See host port interface see also HPI module
Law companding See compress and expand compand
Glossary
Rtos Real-time operating system
Page
Index
Index
Adaptive filtering
Peripheral, defined C-8
Top
Page
Image
Contents