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Texas Instruments
TMS320C64X
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C-10
Contents
Main
Copyright 2006, Texas Instruments Incorporated
Preface
Read This First
About This Manual
Notational Conventions
Related Documentation From Texas Instruments
Trademarks
Contents
Page
Tables
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Page
1.1 Introduction to the TI C64x+ DSPLIB
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1.2 Features and Benefits
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2.1 How to Install DSPLIB
2.2 Using DSPLIB
2.2.1 DSPLIB Arguments and Data Types
Table 21. DSPLIB Data Types
2.2.2 Calling a DSPLIB Function From C
2.2.3 Calling a DSP Function From Assembly
2.2.4 DSPLIB Testing Allowable Error
2.2.5 DSPLIB Overflow and Scaling Issues
2.2.6 Interrupt Behavior of DSPLIB Functions
2.3 How to Rebuild DSPLIB
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DSPLIB Function Tables
Chapter 3
Topic Page
3.1 Arguments and Conventions Used
Table 31. Argument Conventions
3.2 DSPLIB Functions
3.3 DSPLIB Function Tables
Table 32. Adaptive Filtering
Table 33. Correlation
Table 34. FFT
Table 34. FFT (Continued)
Table 35. Filtering and Convolution
Table 35. Filtering and Convolution (Continued)
Table 36. Math
Table 37. Matrix
Table 38. Miscellaneous
Table 39. Obsolete Functions
3.4 Differences Between the C64x and C64x+ DSPLIBs
Table 310. Functions Optimized in the C64x+ DSPLIB
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Table 310. Functions Optimized in the C64x+ DSPLIB (Continued)
Any functions which were not optimized for the C64x+ have the same performance as on the C64x.
DSPLIB Reference
Chapter 4
Topic Page
4.1 Adaptive Filtering
LMS FIR
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4.2 Correlation
AutoCorrelation
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DSP_autocor_rA8
AutoCorrelation DSP_autocor_rA8
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4.3 FFT
Complex Forward Mixed Radix 16 x 16-bit FFT
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Complex Forward Mixed Radix 16 x 16-bit FFT, With Im/Re Order
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Complex Forward Mixed Radix 16 x 16-bit FFT With Rounding
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Complex Forward Mixed Radix 16 x 32-bit FFT With Rounding
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Complex Forward Mixed Radix 32 x 32-bit FFT With Rounding
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Complex Forward Mixed Radix 32 x 32-bit FFT With Scaling
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Complex Inverse Mixed Radix 16 x 16-bit FFT With Rounding
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Complex Inverse Mixed Radix 16 x 16-bit FFT With Im/Re Order
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Complex Inverse Mixed Radix 16 x 32-bit FFT With Rounding
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Complex Inverse Mixed Radix 32 x 32-bit FFT With Rounding
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4.4 Filtering and Convolution
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Complex FIR Filter
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FIR Filter
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FIR Filter (when the number of coefficients is a multiple of 4)
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FIR Filter (when the number of coefficients is a multiple of 8)
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FIR Filter (the number of coefficients is a multiple of 8)
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Symmetric FIR Filter
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IIR With 5 Coefficients
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All-Pole IIR Lattice Filter
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4.5 Math
Vector Dot Product and Square
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Vector Dot Product
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DSP_maxval
Maximum Value of Vector DSP_maxval
Index of Maximum Element of Vector
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DSP_minval
Minimum Value of Vector DSP_minval
32-Bit Vector Multiply
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DSP_neg32
32-Bit Vector Negate DSP_neg32
16-Bit Reciprocal
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DSP_vecsumsq
Sum of Squares DSP_vecsumsq
DSP_w_vec
Weighted Vector Sum DSP_w_vec
4.6 Matrix
Matrix Multiplication
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DSP_mat_trans
Matrix Transpose DSP_mat_trans
DSP_bexp
4.7 Miscellaneous
Block Exponent Implementation DSP_bexp
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Endian-Swap a Block of 16-Bit Values
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Endian-Swap a Block of 32-Bit Values
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Endian-Swap a Block of 64-Bit Values
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DSP_blk_move
Block Move (Overlapping) DSP_blk_move
Float to Q15 Conversion
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Minimum Energy Error Search
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DSP_q15tofl
Q15 to Float Conversion DSP_q15tofl
4.8 Obsolete Functions
4.8.1 FFT
Complex Bit-Reverse
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Complex Forward FFT (radix 2)
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Complex Forward FFT (radix 4)
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Complex Forward FFT With Digital Reversal
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Complex Forward Mixed Radix 16- x 16-Bit FFT With Truncation
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Performance/Fractional Q Formats
A.1 Performance Considerations
A.2 Fractional Q Formats
A.2.1 Q3.12 Format
Table A1.Q3.12 Bit Fields
A.2.2 Q.15 Format
Table A2.Q.15 Bit Fields
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Page
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Appendix A
Appendix C
Glossary
A
B
C
D
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E
F
G
H
I
L
M
N
O
P
R
S
T
W
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Index
A
B
C
D
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E
F
G
H
I
L
Q
R
S
T
U