Texas Instruments TMS320C64X manual Output samples

DSP_fir_r8

Implementation Notes

	- Bank Conflicts: No bank conflicts occur.
	- Interruptibility: The code is interruptible.
	- The load double-word instruction is used to simultaneously load four
	values in a single clock cycle.
	- The inner loop is unrolled 4 times and will always compute a multiple of
	4 output samples.
	- The outer loop is conditionally executed in parallel with the inner loop. This
	allows for a zero overhead outer loop.
Benchmarks	Cycles	nh*nr/4 + 17
	Codesize	336 bytes

C64x+ DSPLIB Reference 4-49