SVM2608 Block Diagram | VXI specification

www.vxitech.com

HS_CHnI+

50 Ohm

HS_CHn–

50 Ohm

HS_EXT_TRIG

EXT_TRIG_LVL

DAC

+ –

÷ 1				SINGLE	GLUE LOGIC
÷ 1		1x, 2x, 4x		HIGH SPEED
				HIGH SPEED
÷ 10				CHANNEL
+		+
DIFF TO			+	12 BITS
SINGLE				12 BITS
SINGLE
–	LPF	–		ADC
	LPF		SINGLE TO
			SINGLE TO
			DIFF
÷ 1	OFFSET_LVL		–
÷ 1
÷ 10		OFFSET
÷ 10	DAC	OFFSET
		ADJ
	REF_LVL		REFERENCE
	+	DAC	REFERENCE
TRIG_LVL		DAC	ADJ



DAC	–		CHNL TRIG
			CHNL TRIG
					CHANNEL_1 TRIG
		CHNL TRIG			TRIG
					TRIG
					CHANNEL_5 TRIG
			SDRAM	16 BITS, 120 MHz
			2 MB	16 BITS, 120 MHz	EXT_TRG
			2 MB		EXT_TRG
			VM2608	16 BITS, 10 MHz
			MAIN BOARD	16 BITS, 10 MHz
			MAIN BOARD	DATA &
				DATA &
				CONTROLS
			REF_LVL
			TRIG_LVL
			OFFSET_LVL
			HS_TRIG_LVL
				LS_TRIG
		LOW_SPEED_CHNLS
				HS_TRIG
FIGURE 1-2: SVM2608 BLOCK DIAGRAM

SVM2608 Introduction

17

Image 17

VXI user manual SVM2608 Block Diagram

Contents

SVM2608 VXI Technology, Inc Table of Contents Self Test Command Limitation of Warranty WarrantyCertification Restricted Rights Legend Steve Mauga, QA Manager EMC Terms and Symbols Service should only be performed by qualified personnelUse Proper Power Cord Use Proper Power Source Ground the Product Avoid Electric ShockOperating Conditions Improper Use VXI Technology Cleveland Instrument Division VXI Technology World HeadquartersVXI Technology Lake Stevens Instrument Division Technical Support VXI Technology, Inc SVM2608 Preface Overview Introduction Scale Triggering Acquiring Data Pre-Trigger Linear ModeDelayed Trigger Commands Fifo ModeCalibrations Test Bus Option SVM2608 Block Diagram Physical Description SVM2608 Environmental Specifications GND CH1I CH3I Front Panel Interface WiringGND CH1I+ GND CH3I+ Exttrigin CH0I CH2I Mtbf SVM2608 Specifications Option 1 SVM2608-01 VXI Technology, Inc SVM2608 Introduction Setting the Chassis Backplane Jumpers Calculating System Power and Cooling Requirements Rotary Switch Locations Setting the Base Address MSB LSB ExampleDivide Decimal Module INSTALLATION/REMOVAL Switch to C and the front switch to Function Offset Device Memory MapsReserved Register Offset MS = Most Significant LS = Least Significant SVM2608 A32 Register MAP 0x72 Command Register Channel 0x74 Databyte Ordering Determining the Register Address Sysfailctl Accessing the RegistersDescription of Registers INTLVL2 Force Trigger, Start Register 0x02 Read & WriteHSTRIGSRC2 EXT Trig Slope External Trigger Level 0x06 Read & Write TimeoutctlReserved 4WIREOHMS 2WIREOHMSLINEAR/FIFO ATTN-GAIN1-GAIN0 KHz Channels 0-3/5 MHz Channels 4-5 LPF Control This bit Sample Rate 0x0C, 0x34, 0x5C, 0x84 Read & WriteSample Rate 0x0E, 0x36, 0x5E, 0x86 Read & Write Sample Rate, High-Speed 0xAE, 0xD6 Read & Write Sample Rate, High-Speed 0xAC, 0xD4 Read & Write Timeout 0x1C, 0x44, 0x6C, 0x94, 0xBC, 0xE4 Read & Write Reserved Registers 0xF8 0xFC Fifo Data 0x24, 0x4C, 0x74, 0x9C, 0xC4, 0xEC Read OnlyFifo Data 0x26, 0x4E, 0x76, 0x9E, 0xC6, 0xEE Read Only Trigger Delay = Measurement Commands Microprocessor Commands Captured Data Calculations Resistance Measurement Dynamic Method Self Test CommandResistance Measurement Offset Method Example Preset Setting Measurement Commands Sample Points Calibration CommandsSample Rate Trigger Event Forced TriggerPage Error Processing There are no errors in the queue Diagnostic Commands Changes become effective the next time the module powers up Examples Example 2 Setting Channel 2 to Acquire 200,000 Samples Example 3 Setting Channel 2 to Pre-acquire 100,000 Samples Timeout Register = Timeout Base * 213 + Timeout Counter Timeout Counter = Timeout / Timeout Base Clock VXI Technology, Inc SVM2608 Programming Data Swapping Example Appendix a VXI Technology, Inc SVM2608 Appendix a Index