Bit 7 -

no se usa

Bit 6 -

Se ajusta cuando la salida Auxiliar entra en el límite de corriente

Bit 5 -

Se ajusta cuando existe una desconexión de dirección de salida 2

Bit 4 -

Se ajusta cuando existe una desconexión térmica de salida 2

Bit 3 -

Se ajusta cuando existe una desconexión de sobrecorriente de salida 2

Bit 2 -

Se ajusta cuando existe una desconexión de sobrevoltaje de salida 2

Bit 1 -

Se ajusta cuando la salida 2 entra en el límite de corriente (modo de corriente constante)

Bit 0 -

Se ajusta cuando la salida 2 entra en el límite de voltaje (modo de voltaje constante)

Registro de byte de estado (Status Byte Register) y Registro de activación de solicitud de servicio (Service Request Enable Register)

Estos dos registros están implementados tal y como requiere la norma IEEE Std. 488.2.

Todos los bits configurados en el Status Byte Register que correspondan a bits configurados en el Service Request Enable Register harán que el bit RQS/MSS se configure en el Status Byte Register, generando así un Service Request en el bus.

El Status Byte Register es leído, bien por el comando *STB?, que devolverá un MSS en el bit 6, o por un Serial Poll que devlolverá un RQS en el bit 6. El Service Request Enable Register es configurado por el comando *SRE <nrf> y leído por el comando *SRE?.

Bit 7 - No se usa.

Bit 6 - RQS/MSS. Este bit, tal como lo define el IEEE Std. 488.2, contiene el mensaje Requesting Service y el mensaje Master Status Summary. Se manda un RQS en respuesta a Serial Poll y un MSS en respuesta al comando *STB?.

Bit 5 - ESB. El Event Status Bit. Este bit se configura si alguno de los bits configurados en el Standard Event Status Register corresponde a los bits configurados en el Standard Event Status Enable Register.

Bit 4 -

Bit 3 -

Bit 2 -

Bit 1 -

Bit 0 -

MAV. El Message Available Bit. Se configurará cuando el instrumento tenga un mensaje de respuesta formateado y listo para mandar al controlador. El bit se borrará después de que se haya mandado el Response Message Terminator.

No se usa.

No se usa.

LIM2. Se ajustará si está ajustado algún bit en Limit Event Status Register 2 y se ajustan los bits correspondientes en Limit Event Status Enable Register 2.

LIM1. Se ajustará si está ajustado algún bit en Limit Event Status Register 1 y se ajustan los bits correspondientes en Limit Event Status Enable Register 1.

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Xantrex Technology XDL 35-5TP manual

XDL 35-5T, XDL 35-5TP specifications

Xantrex Technology has established itself as a leader in the power conversion industry, and their XDL series, specifically the XDL 35-5TP and XDL 35-5T, exemplifies their commitment to innovation and reliability in power management solutions. Designed for a variety of applications, these models offer high performance and efficiency, catering to both professional and recreational users.

The XDL 35-5TP is recognized for its robust design and versatility, suitable for various applications, including battery charging, powering electronic devices, and supporting other power equipment. It features a maximum output of 35 amps and can deliver a continuous power supply sufficient for multiple devices. The integrated temperature monitoring ensures optimal performance and longevity, while the built-in safety features protect against overloads and short circuits.

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