VXI VM4016 user manual Bracketing AN Input Voltage

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INPUT

SIGNAL

FROM

FRONT

PANEL CONNECTOR

100K

K9

10K

10pf

-CH1

100K

-

6K

U17A

100K

+CH1

+

2K

100K

K9

10K

VCC

BUFCH1

-

4.7K

4.7K

CONTROL

U13A

TO

IRQ*

DACDATA

D A C

TRIGLEV1

1K

VMIP

+

BUS

DACLOAD#

DACCLK

470K

TRIGLEV2

U8

VCC

COMPCH1

10K

IRQOUT

CONTROL

4.7K

Q33

DATA 0-15

U3

COMPCH2

1K

100K

10K

K1

470K

10pf

VCC

TRIGLEV2

1K

+

4.7K

-CH2

100K

-

4.7K

U13B

6K

BUFCH2

100K

U17B

-

+CH2

+

2K

100K

K1

10K

FIGURE 3-2: BRACKETING AN INPUT VOLTAGE

The command and data for the SCPI command INP:RANG are received by the control (U1) and data (U4) buffers (not shown for clarity) and routed to the control FPGA (U3). The control FPGA converts the parallel data for the relay drivers into a serial data stream. This data (RELAYDATA) is synched to the 10 MHz (RELAYCLK) and written into the relay drivers when (RELAYENA*) goes low. The relay drivers de-energize relays K9 and K1 selecting a gain of 1.0 for the differential amplifiers at U17A and U17B.

The command and data for the SCPI command INP:DEB are received by the control (U1) and data (U4) buffers and routed to the control FPGA (U3). The register for the debounce circuitry is contained internally in the control FPGA. The register will be loaded with a value that corresponds to a 750 µs time delay.

VM4016 Programming

39

Image 39

Contents VM4016 Page Table of Contents VXI Technology, Inc Restricted Rights Legend WarrantyLimitation of Warranty CertificationEMC C L a R a T I O N O F C O N F O R M I T YTerms and Symbols General Safety InstructionsThis product. Product should be inspected or serviced Support Resources VXI Technology, Inc VM4016 Preface Introduction IntroductionFront Panel Layout DescriptionVM4016 Block Diagram IRQ Output VM4016 General SpecificationsInstallation Calculating System Power and Cooling RequirementsPreparation for USE Setting the Chassis Backplane Jumpers Setting the Logical AddressFront Panel Interface Wiring Analog Comparator PIN Outs Signal PIN Number1631 Programming Examples of Scpi Commands FETCHCONDITIONED?FETCHLATCHED? FETCHRAW? Inhousepseudo Inhouseregint InhouseregintInhouseregenable Inhouseclearlatch Examples InputdebounceINPMASK? InputmaskInputmaskinterrupt INPutMASKINTerrupt boolean Where boolean is 0 OFF 1 onINPOFFS? InputoffsetINPutPOLarity NORM,@35 InputpolarityInputrange Outputpolarityexternalinterrupt Outputpolarityexternallatched Example Application ExamplesSingle Channel Operation Commands DescriptionControl Page Sets the external interrupt output to be active high Bracketing a VoltageBracketing AN Input Voltage Page Register MAP Register Access ExamplesFor example Pseudo Register Access VXIPLUG&PLAY Driver Examples VM4016 Programming VXI Technology, Inc Alphabetical Command Listing Command DictionaryIeee 488.2 Common Commands Normal Instrument Specific Scpi CommandsScpi Required Commands Query Parameters Command DictionaryCLS Common Scpi CommandsResponse Description ESEESR? IDN? Query Parameters Query Response Description OPCRST SRE STB? TRG TST? OPC WAIFETChCONDitioned? Instrument Specific Scpi CommandsFETChLATChed? FETChRAW? Inhouseclearlatch Inhousepseudo Inhouseregint Inhouseregenable INPutDEBounce INPutMASK INPutMASKINTerrupt INPutOFFSet INPutPOLarity INPutRANGe OUTPutPOLarityEXTernalINTerrupt OUTPutPOLarityEXTernalLATChed STATusOPERationCONDition? Required Scpi CommandsSTATusOPERationENABle STATusOPERationEVENt? STATusPRESet STATusQUEStionableCONDition? STATusQUEStionableENABle STATusQUEStionableEVENt SYSTemERRor? SYSTemVERSion? Theory of Operation Input Range Control Relay Signal Comparison Interrupt Generation Interrupt Generation OUTPutPOLarityEXTernalLATChed Index