VXI VM4016 user manual Theory of Operation, Introduction

Page 87

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SECTION 5

THEORY OF OPERATION

INTRODUCTION

The VM4016 is a high-performance Analog Comparator module with 16 input channels per VMIP daughter module. Each input channel consists of a differential amplifier with a gain of 1 or

0.1giving an input range of ±10 volts or ±100 volts. Each input is compared against a reference voltage derived from an independent 8-bit DAC. The VM4016 has a resolution of 78 mV.

Each input signal is digitally debounced for a programmed time ranging from approximately 10 ∝s to 0.5 s. This prevents input signal noise from causing undesired interrupts. After debounce, the signal may be programatically inverted to select the input transition edge of interest (rising or falling edge) and masked to prevent unused channels from causing interrupts.

All the masked inputs are OR’ed together to produce a single interrupt signal. This interrupt signal is used to generate a VXIbus interrupt as well as the front panel interrupt outputs. Special logic will latch the first input to cross its threshold, into the First Latched Register. This records the originating input. The First Latched Register can be cleared by querying the Latched Register contents using the word serial command FETCh:LATched?, or by querying the data via Pseudo Register Access with the INHOUSE:CLEAR_LATCH set to 1 or ON.

The state of each channel’s debounced input and the inverted and masked status may be read directly in the user-defined area of the VXIbus registers, as can the First Latched register. This information may also be retrieved using the message-based word serial interface.

All channels on the VM4016 are identical in functionality, therefore, descriptions in this theory of operation will pertain to Channel 1 (CH1) only.

VM4016 Theory of Operation

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Contents VM4016 Page Table of Contents VXI Technology, Inc Restricted Rights Legend WarrantyLimitation of Warranty CertificationEMC C L a R a T I O N O F C O N F O R M I T YTerms and Symbols General Safety InstructionsThis product. Product should be inspected or serviced Support Resources VXI Technology, Inc VM4016 Preface Introduction IntroductionFront Panel Layout DescriptionVM4016 Block Diagram IRQ Output VM4016 General SpecificationsInstallation Calculating System Power and Cooling RequirementsPreparation for USE Setting the Chassis Backplane Jumpers Setting the Logical AddressFront Panel Interface Wiring Analog Comparator PIN Outs Signal PIN Number1631 Programming Examples of Scpi Commands FETCHCONDITIONED?FETCHLATCHED? FETCHRAW? Inhousepseudo Inhouseregint InhouseregintInhouseregenable Inhouseclearlatch Examples InputdebounceINPMASK? InputmaskInputmaskinterrupt INPutMASKINTerrupt boolean Where boolean is 0 OFF 1 onINPOFFS? InputoffsetINPutPOLarity NORM,@35 InputpolarityInputrange Outputpolarityexternalinterrupt Outputpolarityexternallatched Example Application ExamplesSingle Channel Operation Commands DescriptionControl Page Sets the external interrupt output to be active high Bracketing a VoltageBracketing AN Input Voltage Page Register MAP Register Access ExamplesFor example Pseudo Register Access VXIPLUG&PLAY Driver Examples VM4016 Programming VXI Technology, Inc Alphabetical Command Listing Command DictionaryIeee 488.2 Common Commands Normal Instrument Specific Scpi CommandsScpi Required Commands Query Parameters Command DictionaryCLS Common Scpi CommandsResponse Description ESEESR? IDN? Query Parameters Query Response Description OPCRST SRE STB? TRG TST? OPC WAIFETChCONDitioned? Instrument Specific Scpi CommandsFETChLATChed? FETChRAW? Inhouseclearlatch Inhousepseudo Inhouseregint Inhouseregenable INPutDEBounce INPutMASK INPutMASKINTerrupt INPutOFFSet INPutPOLarity INPutRANGe OUTPutPOLarityEXTernalINTerrupt OUTPutPOLarityEXTernalLATChed STATusOPERationCONDition? Required Scpi CommandsSTATusOPERationENABle STATusOPERationEVENt? STATusPRESet STATusQUEStionableCONDition? STATusQUEStionableENABle STATusQUEStionableEVENt SYSTemERRor? SYSTemVERSion? Theory of Operation Input Range Control Relay Signal Comparison Interrupt Generation Interrupt Generation OUTPutPOLarityEXTernalLATChed Index