Omega OME-A822PG manual Jumper Settings, 1 JP1 D/A Internal Reference Voltage Selection

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The PC I/O port map is given below.

ADDRESS

Device

ADDRESS

DEVICE

000-1FF

PC reserved

320-32F

XT Hard Disk

200-20F

Game/control

378-37F

Parallel Printer

210-21F

XT Expansion Unit

380-38F

SDLC

238-23F

Bus Mouse/Alt. Bus Mouse

3A0-3AF

SDLC

278-27F

Parallel Printer

3B0-3BF

MDA/Parallel Printer

2B0-2DF

EGA

3C0-3CF

EGA

2E0-2E7

AT GPIB

3D0-3DF

CGA

2E8-2EF

Serial Port

3E8-3EF

Serial Port

2F8-2FF

Serial Port

3F0-3F7

Floppy Disk

300-31F

Prototype Card

3F8-3FF

Serial Port

2.3Jumper Settings

2.3.1JP1 : D/A Internal Reference Voltage Selection

Reference Voltage -5V (default)

(-10V)

1

2

3

(-5V)

Reference Voltage -10V

1

2

3

(-10V)

(-5V)

Select (-5V) : D/A voltage output = 0 to 5V (both channel)

Select (-10V) : D/A voltage output = 0 to 10V (both channel)

JP1 is valid only if JP2 is set to D/A internal reference voltage

OME-A-822PGL/PGH Hardware Manual ---- 11

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Contents User’sGuide Mexico CanadaBenelux Czech RepublicOME-A-822PGH/PGL Introduction Tables of ContentsConnector General Description FeaturesPower Consumption SpecificationsAnalog Inputs 3 A/D ConverterDigital I/O DA ConverterInterrupt Channel Direct Memory Access Channel DMA Programmable Timer/CounterProduct Check List ApplicationsBoard Layout Hardware ConfigurationDefault base address is I/O Base Address Setting1 JP1 D/A Internal Reference Voltage Selection Jumper Settings3 JP3 Single-ended/Differential Selection 2 JP2 D/A Int/Ext Ref Voltage Selection5 JP5 Interrupt Level Selection 4 JP4 A/D Trigger Source Selection6 JP6 User Timer/Counter Clock Input Selection DRQ JP7 Dack JP8 DMA 7 JP7 DMA Dack Selection JP8 DMA DRQ SelectionAddress Read Write I/O Register Address2 A/D Input Buffer Register 1 8254 CounterConversion is completed, the Ready bit will clear to zero 3 D/A Output Latch Register Clear Interrupt Request 4 D/I Input Buffer RegisterGAIN3 GAIN2 GAIN1 GAIN0 6 A/D Gain Control Register7 A/D Multiplex Control Register OME-A-822PGH Gain Control Code Table8 A/D Mode Control Register 9 A/D Software Trigger Control Register 10 D/O Output Latch Register CN2 Digital I/OCounter 8254 Timer/CounterA/D Conversion Polling, interrupt and DMA 1 A/D conversion flow3 A/D Transfer Modes 2 A/D Conversion Trigger ModesDelay the settling time refer to Sec .4.6 and Sec Using software trigger and polling transferRefer to Sec D/A Conversion Analog Input Signal Connection OME-A-822PGL/PGH Hardware Manual OME-A-822PGL/PGH Hardware Manual Use a single connection to frame ground not A.GND or D.GND Signal ShieldingUsing OME-DB-8225 CJC Output CN1 Digital Input Pin Assignment CN1/CN2/CN3 Pin AssignmentCN2 Digital Output Pin Assignment SINGLE-ENDED Signal Mode Differential Signals OME-DB-8225 Daughter BoardOME-DB-37 OME-DB-16PDescription of Variable Resistors CalibrationD/A Calibration A/D Calibration Introduction Diagnostic UtilityOME-A-822PGL/PGH Hardware Manual Running The Diagnostic Utility Base address selection screen SetupDMA no and IRQ no selection screen Calibration Function Test Test Test Screen Digital I/O Test Screen Multiplexer Test Screen Use IRQ Test Screen Use DMA Test Screen DA Gain Test Screen Timer 0 Test Screen Special Test Help WARRANTY/DISCLAIMER Temperature