Cypress CY7C1318CV18-250BZC manual Capacitance, Thermal Resistance, AC Electrical Characteristics

Page 19

CY7C1318CV18

CY7C1320CV18

Electrical Characteristics (continued)

DC Electrical Characteristics

Over the Operating Range[12]

Parameter

Description

Test Conditions

 

Min

Typ

Max

Unit

ISB1

Automatic Power Down

Max VDD,

267 MHz

(x18)

 

 

315

mA

 

Current

Both Ports Deselected,

 

 

 

 

 

 

 

 

(x36)

 

 

330

 

 

 

VIN VIH or VIN VIL

 

 

 

 

 

 

250 MHz

(x18)

 

 

300

 

 

 

f = fMAX = 1/tCYC,

 

 

 

 

 

 

 

 

 

(x36)

 

 

320

 

 

 

Inputs Static

 

 

 

 

 

 

 

200 MHz

(x18)

 

 

290

 

 

 

 

 

(x36)

 

 

300

 

 

 

 

167 MHz

(x18)

 

 

285

 

 

 

 

 

(x36)

 

 

295

 

AC Electrical Characteristics

Over the Operating Range[11]

Parameter

Description

Test Conditions

Min

Typ

Max

Unit

VIH

Input HIGH Voltage

 

VREF + 0.2

V

VIL

Input LOW Voltage

 

VREF – 0.2

V

Capacitance

Tested initially and after any design or process change that may affect these parameters.

Parameter

Description

Test Conditions

Max

Unit

CIN

Input Capacitance

TA = 25°C, f = 1 MHz, VDD = 1.8V, VDDQ = 1.5V

5

pF

CCLK

Clock Input Capacitance

 

6

pF

CO

Output Capacitance

 

7

pF

Thermal Resistance

Tested initially and after any design or process change that may affect these parameters.

Parameter

Description

 

Test Conditions

165 FBGA

Unit

 

Package

 

 

 

 

 

ΘJA

Thermal Resistance

 

Test conditions follow standard test methods and

18.7

°C/W

 

(Junction to Ambient)

 

procedures for measuring thermal impedance, in

 

 

 

 

 

accordance with EIA/JESD51.

 

 

ΘJC

Thermal Resistance

 

4.5

°C/W

 

(Junction to Case)

 

 

 

 

 

 

Figure 4. AC Test Loads and Waveforms

 

 

VREF = 0.75V

VREF

 

 

 

 

 

 

0.75V

 

 

 

 

 

 

 

 

OUTPUT

 

 

 

 

 

 

 

Z0 = 50Ω

 

 

 

 

 

 

 

 

 

Device

 

 

 

 

 

 

 

Under

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Test

 

 

 

 

 

 

 

 

 

 

ZQ

RQ =

250Ω

(a)

Note

RL = 50Ω

VREF = 0.75V

VREF 0.75V

OUTPUT

Device

Under

Test ZQ

RQ = 250Ω

INCLUDING

JIG AND (b)

SCOPE

R = 50Ω

[20]

ALL INPUT PULSES

 

 

1.25V

5 pF

0.25V

 

 

 

0.75V

 

 

 

 

 

 

 

 

Slew Rate = 2 V/ns

20.Unless otherwise noted, test conditions assume signal transition time of 2V/ns, timing reference levels of 0.75V, VREF = 0.75V, RQ = 250Ω, VDDQ = 1.5V, input pulse levels of 0.25V to 1.25V, and output loading of the specified IOL/IOH and load capacitance shown in (a) of AC Test Loads and Waveforms.

Document Number: 001-07160 Rev. *F

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Contents Selection Guide FeaturesConfigurations Functional DescriptionLogic Block Diagram CY7C1320CV18 Logic Block Diagram CY7C1318CV18CY7C1320CV18 512K x Pin ConfigurationBall Fbga 13 x 15 x 1.4 mm Pinout CY7C1318CV18 1M xReferenced with Respect to Pin DefinitionsPin Name Pin Description Synchronous Read/Write Input. WhenTCK Pin for Jtag Power Supply Inputs to the Core of the DevicePower Supply Inputs for the Outputs of the Device TDO for JtagFunctional Overview SRAM#1 ZQ Application ExampleProgrammable Impedance Echo ClocksComments Write Cycle DescriptionsOperation First Address External Second Address InternalDevice. D80 and D3518 remains unaltered Write cycle description table for CY7C1320CV18 follows.2Device Into the device. D359 remains unalteredIeee 1149.1 Serial Boundary Scan Jtag Idcode State diagram for the TAP controller follows.9 TAP Controller State DiagramTAP Electrical Characteristics TAP Controller Block DiagramTAP Timing and Test Conditions TAP AC Switching CharacteristicsRegister Name Bit Size Identification Register DefinitionsScan Register Sizes Instruction CodesBit # Bump ID Boundary Scan OrderPower Up Sequence Power Up Sequence in DDR II SramDLL Constraints Maximum Ratings Neutron Soft Error ImmunityElectrical Characteristics DC Electrical CharacteristicsParameter Description Test Conditions Max Unit AC Electrical CharacteristicsCapacitance Thermal ResistanceParameter Min Max DLL Timing Parameter Min Max Output TimesRead/Write/Deselect Sequence26, 27 Switching WaveformsCY7C1320CV18-267BZXC Ordering InformationCY7C1320CV18-167BZC Document Number 001-07160 Rev. *F Ball Fbga 13 x 15 x 1.4 mm Package DiagramDocument History Worldwide Sales and Design Support Products Sales, Solutions, and Legal Information