Cypress CY7C1355C, CY7C1357C manual 3V TAP AC Test Conditions, 5V TAP AC Test Conditions

CY7C1355C

CY7C1357C

3.3V TAP AC Test Conditions

Input pulse levels	VSS to 3.3V
Input rise and fall times	1 ns
Input timing reference levels	1.5V
Output reference levels	1.5V
Test load termination supply voltage	1.5V

2.5V TAP AC Test Conditions

Input pulse levels	VSS to 2.5V
Input rise and fall time	1 ns
Input timing reference levels	1.25V
Output reference levels	1.25V
Test load termination supply voltage	1.25V

3.3V TAP AC Output Load Equivalent				2.5V TAP AC Output Load Equivalent
		1.5V				1.25V
			50Ω				50Ω
TDO				TDO
	ZO= 50Ω		20pF		ZO= 50Ω		20pF

TAP DC Electrical Characteristics And Operating Conditions (0°C < TA < +70°C; VDD = 3.3V ± 0.165V unless
otherwise noted)[12]
Parameter	Description		Conditions		Min.	Max.	Unit
VOH1	Output HIGH Voltage	IOH = –4.0 mA, VDDQ = 3.3V			2.4		V
		IOH = –1.0 mA, VDDQ = 2.5V
					2.0		V
VOH2	Output HIGH Voltage	IOH = –100 µA		VDDQ = 3.3V	2.9		V
				VDDQ = 2.5V	2.1		V
VOL1	Output LOW Voltage	IOL = 8.0 mA		VDDQ = 3.3V		0.4	V
		IOL = 8.0 mA		VDDQ = 2.5V		0.4	V
VOL2	Output LOW Voltage	IOL = 100 µA		VDDQ = 3.3V		0.2	V
				VDDQ = 2.5V		0.2	V
VIH	Input HIGH Voltage			VDDQ = 3.3V	2.0	VDD + 0.3	V
				VDDQ = 2.5V	1.7	VDD + 0.3	V
VIL	Input LOW Voltage			VDDQ = 3.3V	–0.5	0.7	V
				VDDQ = 2.5V	–0.3	0.7	V
IX	Input Load Current	GND < VIN < VDDQ			–5	5	µA

Identification Register Definitions

Instruction Field	CY7C1355C	CY7C1357C	Description
	(256Kx36)	(512Kx18)
Revision Number (31:29)	010	010	Describes the version number
Device Depth (28:24)	01010	01010	Reserved for Internal Use
Device Width (23:18)	001001	001001	Defines memory type and architecture
Cypress Device ID (17:12)	100110	010110	Defines width and density
Cypress JEDEC ID Code (11:1)	00000110100	00000110100	Allows unique identification of SRAM vendor
ID Register Presence Indicator (0)	1	1	Indicates the presence of an ID register

Note:

12. All voltages referenced to VSS (GND).

Document #: 38-05539 Rev. *E Page 14 of 28

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