Cypress CY7C1357C, CY7C1355C manual Switching Waveforms, Read/Write Waveforms22, 23, Command

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CY7C1355C

CY7C1357C

Switching Waveforms

Read/Write Waveforms[22, 23, 24]

1	2	tCYC 3	4	5	6	7	8	9	10
CLK
tCENS tCENH	tCH	tCL

CEN

tCES tCEH

CE

ADV/LD

WE

BWX

ADDRESS	A1	A2		A3	A4		A5	A6	A7
tAS	tAH			tCDV
tAS	tAH			tCLZ	tDOH		tOEV tCHZ
				tCLZ	tDOH		tOEV tCHZ
DQ		D(A1)	D(A2)	D(A2+1)	Q(A3)	Q(A4)	Q(A4+1)	D(A5)	Q(A6)	D(A7)
	tDS	tDH				tOEHZ	tDOH
OE							tOELZ
COMMAND	WRITE	WRITE	BURST	READ	READ	BURST	WRITE	READ	WRITE	DESELECT
	WRITE	WRITE	BURST	READ	READ	BURST	WRITE	READ	WRITE	DESELECT
	D(A1)	D(A2)	WRITE	Q(A3)	Q(A4)	READ	D(A5)	Q(A6)	D(A7)
			D(A2+1)			Q(A4+1)
				DON’T CARE		UNDEFINED

Notes:

22.For this waveform ZZ is tied LOW.

23.When CE is LOW, CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH, CE1 is HIGH or CE2 is LOW or CE3 is HIGH.

24.Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved). Burst operations are optional.

Document #: 38-05539 Rev. *E

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Contents Functional Description1 FeaturesSelection Guide 133 MHz 100 MHz UnitLogic Block Diagram CY7C1357C 512K x Logic Block Diagram CY7C1355C 256K xCY7C1355C Pin Configurations Pin Tqfp PinoutCY7C1357C Pin Configurations Ball BGA Pinout 3 Chip Enables with Jtag Pin Configurations Ball Fbga Pinout 3 Chip enable with Jtag CE2 CLKCE2 Power supply for the I/O circuitry Power supply inputs to the core of the devicePin Definitions Name DescriptionBurst Read Accesses Single Read AccessesSingle Write Accesses Functional OverviewInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Partial Truth Table for Read/Write2, 3 Sleep ModeTruth Table for Read/Write2, 3,9 Function CY7C1355CTAP Controller Block Diagram TAP Controller State DiagramIeee 1149.1 Serial Boundary Scan Jtag TAP Instruction Set Bypass RegisterParameter Description Min Max Unit Clock TAP TimingOutput Times Set-up Times5V TAP AC Test Conditions 3V TAP AC Test Conditions5V TAP AC Output Load Equivalent Identification Register DefinitionsIdentification Codes Scan Register SizesRegister Name Bit Size Instruction Code DescriptionCY7C1357C 512K x Bit# Ball Id Signal Name CY7C1355C 256K x Bit# Ball ID SignalBall BGA Boundary Scan Order NameCY7C1355C 256K x Bit# Ball ID Signal Name Ball Fbga Boundary Scan OrderBWD Maximum Ratings Electrical Characteristics Over the Operating Range13Operating Range Ambient RangeThermal Resistance15 Capacitance15AC Test Loads and Waveforms 3V I/O Test Load100 Parameter Description Unit Min Max Switching Characteristics Over the Operating Range 16Command Switching WaveformsRead/Write Waveforms22, 23 WriteQA4+1 DA5 QA6 DA7 NOP, Stall and Deselect Cycles22, 23ZZ Mode Timing26 Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package Diagrams90±0.05 Ball BGA 14 x 22 x 2.4 mmSoldernotespad Type NON-SOLDER Mask Defined Nsmd Document History Issue Date Orig. Description of Change