Cypress CY7C1355C, CY7C1357C manual Maximum Ratings, Operating Range, Ambient Range

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CY7C1355C

CY7C1357C

Maximum Ratings

(Above which the useful life may be impaired. For user guide- lines, not tested.)

Storage Temperature

–65°C to +150°C

Ambient Temperature with

 

 

Power Applied

–55°C to +125°C

Supply Voltage on VDD Relative to GND

–0.5V to +4.6V

Supply Voltage on VDDQ Relative to GND

–0.5V to +VDD

DC Voltage Applied to Outputs

 

 

in Tri-State

–0.5V to VDDQ + 0.5V

DC Input Voltage

–0.5V to VDD + 0.5V

Current into Outputs (LOW)

 

20 mA

Static Discharge Voltage

 

> 2001V

(per MIL-STD-883, Method 3015)

 

Latch-up Current

 

> 200 mA.

Operating Range

 

 

 

 

 

 

 

Ambient

 

 

Range

Temperature

VDD

VDDQ

Commercial

0°C to +70°C

3.3V – 5%/+10%

2.5V – 5%

 

 

 

to VDD

Industrial

–40°C to +85°C

 

Electrical Characteristics Over the Operating Range[13, 14]

Parameter

Description

Test Conditions

Min.

Max.

Unit

VDD

Power Supply Voltage

 

 

3.135

3.6

V

VDDQ

I/O Supply Voltage

for 3.3V I/O

 

3.135

VDD

V

 

 

for 2.5V I/O

 

2.375

2.625

 

 

 

 

 

 

 

 

VOH

Output HIGH Voltage

for 3.3V I/O, IOH = 4.0 mA

 

2.4

 

V

 

 

for 2.5V I/O, IOH = 1.0 mA

 

2.0

 

V

VOL

Output LOW Voltage

for 3.3V I/O, IOL= 8.0 mA

 

 

0.4

V

 

 

for 2.5V I/O, IOL= 1.0 mA

 

 

0.4

V

VIH

Input HIGH Voltage[13]

for 3.3V I/O

 

2.0

VDD + 0.3V

V

 

 

for 2.5V I/O

 

1.7

VDD + 0.3V

V

VIL

Input LOW Voltage[13]

for 3.3V I/O

 

–0.3

0.8

V

 

 

for 2.5V I/O

 

–0.3

0.7

V

 

 

 

 

 

 

 

IX

Input Leakage Current

GND VI VDDQ

 

–5

5

A

 

except ZZ and MODE

 

 

 

 

 

 

Input Current of MODE

Input = VSS

 

–30

 

A

 

 

Input = VDD

 

 

5

A

 

Input Current of ZZ

Input = VSS

 

–5

 

A

 

 

Input = VDD

 

 

30

A

IOZ

Output Leakage Current

GND VI VDDQ, Output Disabled

–5

5

A

IDD

VDD Operating Supply

VDD = Max., IOUT = 0 mA,

7.5-ns cycle, 133 MHz

 

250

mA

 

Current

f = fMAX = 1/tCYC

 

 

 

 

 

10-ns cycle, 100 MHz

 

180

mA

ISB1

Automatic CE

VDD = Max, Device Deselected,

All speeds

 

110

mA

 

Power-down

VIN VIH or VIN VIL

 

 

 

 

 

Current—TTL Inputs

f = fMAX, inputs switching

 

 

 

 

ISB2

Automatic CE

VDD = Max, Device Deselected,

All speeds

 

40

mA

 

Power-down

VIN 0.3V or VIN > VDD – 0.3V,

 

 

 

 

 

Current—CMOS Inputs

f = 0, inputs static

 

 

 

 

ISB3

Automatic CE

VDD = Max, Device Deselected, or

All speeds

 

100

mA

 

Power-down

VIN 0.3V or VIN > VDDQ – 0.3V

 

 

 

 

 

Current—CMOS Inputs

f = fMAX, inputs switching

 

 

 

 

ISB4

Automatic CE

VDD = Max, Device Deselected,

All Speeds

 

40

mA

 

Power-down

VIN VIH or VIN VIL, f = 0, inputs

 

 

 

 

 

Current—TTL Inputs

static

 

 

 

 

Notes:

13.Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > –2V (Pulse width less than tCYC/2).

14.TPower-up: Assumes a linear ramp from 0V to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

Document #: 38-05539 Rev. *E

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Contents Selection Guide FeaturesFunctional Description1 133 MHz 100 MHz UnitLogic Block Diagram CY7C1355C 256K x Logic Block Diagram CY7C1357C 512K xPin Configurations Pin Tqfp Pinout CY7C1355CCY7C1357C Pin Configurations Ball BGA Pinout 3 Chip Enables with Jtag Pin Configurations Ball Fbga Pinout 3 Chip enable with Jtag CE2 CLKCE2 Pin Definitions Power supply inputs to the core of the devicePower supply for the I/O circuitry Name DescriptionSingle Write Accesses Single Read AccessesBurst Read Accesses Functional OverviewInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Truth Table for Read/Write2, 3,9 Sleep ModePartial Truth Table for Read/Write2, 3 Function CY7C1355CTAP Controller Block Diagram TAP Controller State DiagramIeee 1149.1 Serial Boundary Scan Jtag Bypass Register TAP Instruction SetOutput Times TAP TimingParameter Description Min Max Unit Clock Set-up Times5V TAP AC Output Load Equivalent 3V TAP AC Test Conditions5V TAP AC Test Conditions Identification Register DefinitionsRegister Name Bit Size Scan Register SizesIdentification Codes Instruction Code DescriptionBall BGA Boundary Scan Order CY7C1355C 256K x Bit# Ball ID SignalCY7C1357C 512K x Bit# Ball Id Signal Name NameCY7C1355C 256K x Bit# Ball ID Signal Name Ball Fbga Boundary Scan OrderBWD Operating Range Electrical Characteristics Over the Operating Range13Maximum Ratings Ambient RangeAC Test Loads and Waveforms Capacitance15Thermal Resistance15 3V I/O Test LoadSwitching Characteristics Over the Operating Range 16 100 Parameter Description Unit Min MaxRead/Write Waveforms22, 23 Switching WaveformsCommand WriteNOP, Stall and Deselect Cycles22, 23 QA4+1 DA5 QA6 DA7ZZ Mode Timing26 Ordering Information Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall BGA 14 x 22 x 2.4 mm 90±0.05Soldernotespad Type NON-SOLDER Mask Defined Nsmd Issue Date Orig. Description of Change Document History