Cypress CY7C1371D manual 3V TAP AC Test Conditions, Parameter Description Conditions Min Max Unit

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CY7C1371D

CY7C1373D

3.3V TAP AC Test Conditions

2.5V TAP AC Test Conditions

Input pulse levels

.VSS to 3.3V

Input rise and fall times

1 ns

Input timing reference levels

1.5V

Output reference levels

1.5V

Test load termination supply voltage

1.5V

Input pulse level

VSS to 2.5V

Input rise and fall time

1 ns

Input timing reference levels

.1.25V

Output reference levels

1.25V

Test load termination supply voltage

1.25V

3.3V TAP AC Output Load Equivalent

2.5V TAP AC Output Load Equivalent

 

 

 

 

 

 

1.5V

 

 

 

 

 

 

 

1.25V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20pF

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TAP DC Electrical Characteristics And Operating Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(0°C < TA < +70°C; VDD = 3.3V ±0.165V unless otherwise noted)[12]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

Description

 

 

 

 

 

 

 

 

Description

 

Conditions

Min

 

 

Max

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH1

Output HIGH Voltage

 

 

 

 

 

 

 

 

IOH = –4.0 mA

 

 

VDDQ = 3.3V

2.4

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

IOH = –1.0 mA

 

 

VDDQ = 2.5V

2.0

 

 

 

 

 

 

 

 

 

 

 

V

VOH2

Output HIGH Voltage

 

 

 

 

 

 

 

 

IOH = –100 µA

 

 

VDDQ = 3.3V

2.9

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

2.1

 

 

 

 

 

 

 

 

 

 

 

V

VOL1

Output LOW Voltage

 

 

 

 

 

 

 

 

IOL = 8.0 mA

 

 

VDDQ = 3.3V

 

 

 

0.4

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

IOL = 1.0 mA

 

 

VDDQ = 2.5V

 

 

 

0.4

 

V

VOL2

Output LOW Voltage

 

 

 

 

 

 

 

 

IOL = 100 µA

 

 

VDDQ = 3.3V

 

 

 

0.2

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

 

 

 

0.2

 

V

VIH

Input HIGH Voltage

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 3.3V

2.0

 

 

VDD + 0.3

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

1.7

 

 

VDD + 0.3

 

V

VIL

Input LOW Voltage

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 3.3V

–0.5

0.7

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

–0.3

0.7

 

V

IX

Input Load Current

 

 

 

 

 

 

 

 

GND < VIN < VDDQ

 

 

 

–5

5

 

µA

Note:

12. All voltages referenced to VSS (GND).

Document #: 38-05556 Rev. *F

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Contents Cypress Semiconductor Corporation FeaturesSelection Guide Functional Description1 133 MHz 100 MHz UnitLogic Block Diagram CY7C1373D 1M x Logic Block Diagram CY7C1371D 512K xCY7C1371D Pin Configurations Pin Tqfp PinoutCY7C1373D Pin Configurations CE2 Pin Configurations Ball Fbga PinoutPin Definitions Functional Overview Single Read AccessesBurst Read Accesses Single Write AccessesInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Function CY7C1373D Partial Truth Table for Read/Write 2, 3Address Operation Used Function CY7C1371DIeee 1149.1 Serial Boundary Scan Jtag TAP Controller State Diagram TAP Controller Block DiagramTAP Instruction Set Bypass RegisterExtest Output Bus Tri-State TAP TimingOutput Times TAP AC Switching Characteristics Over the Operating Range10Setup Times Parameter Description Min Max Unit ClockTAP DC Electrical Characteristics And Operating Conditions 3V TAP AC Test ConditionsParameter Description Conditions Min Max Unit Register Name Bit Size Identification Register DefinitionsScan Register Sizes Identification CodesBit # Ball ID Ball BGA Boundary Scan Order 13A10 B10 P10 Ambient Range Electrical CharacteristicsMaximum Ratings Operating RangeCapacitance18 Thermal Resistance18AC Test Loads and Waveforms 133 MHz 100 MHz Parameter Description Unit Min Max Switching Characteristics Over the Operating Range23Read Switching WaveformsRead/Write Waveforms25, 26 RiteStall NOP NOP, Stall and Deselect Cycles25, 26Address StallDON’T Care ZZ Mode Timing29Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall BGA 14 x 22 x 2.4 mm Ball Fbga 13 x 15 x 1.4 mm Document History Issue Orig. Description of Change Date
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