Cypress CY7C1371D, CY7C1373D manual Ball BGA Boundary Scan Order 13, Bit # Ball ID

Page 17

CY7C1371D

CY7C1373D

119-Ball BGA Boundary Scan Order [13, 14]

Bit #

Ball ID

 

Bit #

Ball ID

 

Bit #

Ball ID

 

Bit #

Ball ID

 

 

 

 

 

 

 

 

 

 

 

1

H4

 

23

F6

 

45

G4

 

67

L1

 

 

 

 

 

 

 

 

 

 

 

2

T4

 

24

E7

 

46

A4

 

68

M2

 

 

 

 

 

 

 

 

 

 

 

3

T5

 

25

D7

 

47

G3

 

69

N1

 

 

 

 

 

 

 

 

 

 

 

4

T6

 

26

H7

 

48

C3

 

70

P1

 

 

 

 

 

 

 

 

 

 

 

5

R5

 

27

G6

 

49

B2

 

71

K1

 

 

 

 

 

 

 

 

 

 

 

6

L5

 

28

E6

 

50

B3

 

72

L2

 

 

 

 

 

 

 

 

 

 

 

7

R6

 

29

D6

 

51

A3

 

73

N2

 

 

 

 

 

 

 

 

 

 

 

8

U6

 

30

C7

 

52

C2

 

74

P2

 

 

 

 

 

 

 

 

 

 

 

9

R7

 

31

B7

 

53

A2

 

75

R3

 

 

 

 

 

 

 

 

 

 

 

10

T7

 

32

C6

 

54

B1

 

76

T1

 

 

 

 

 

 

 

 

 

 

 

11

P6

 

33

A6

 

55

C1

 

77

R1

 

 

 

 

 

 

 

 

 

 

 

12

N7

 

34

C5

 

56

D2

 

78

T2

 

 

 

 

 

 

 

 

 

 

 

13

M6

 

35

B5

 

57

E1

 

79

L3

 

 

 

 

 

 

 

 

 

 

 

14

L7

 

36

G5

 

58

F2

 

80

R2

 

 

 

 

 

 

 

 

 

 

 

15

K6

 

37

B6

 

59

G1

 

81

T3

 

 

 

 

 

 

 

 

 

 

 

16

P7

 

38

D4

 

60

H2

 

82

L4

 

 

 

 

 

 

 

 

 

 

 

17

N6

 

39

B4

 

61

D1

 

83

N4

 

 

 

 

 

 

 

 

 

 

 

18

L6

 

40

F4

 

62

E2

 

84

P4

 

 

 

 

 

 

 

 

 

 

 

19

K7

 

41

M4

 

63

G2

 

85

Internal

 

 

 

 

 

 

 

 

 

 

 

20

J5

 

42

A5

 

64

H1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

21

H6

 

43

K4

 

65

J3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

G7

 

44

E4

 

66

2K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

13.Balls which are NC (No Connect) are pre-set LOW.

14.Bit# 85 is pre-set HIGH.

Document #: 38-05556 Rev. *F

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Contents Selection Guide Functional Description1 Features133 MHz 100 MHz Unit Cypress Semiconductor CorporationLogic Block Diagram CY7C1373D 1M x Logic Block Diagram CY7C1371D 512K xCY7C1371D Pin Configurations Pin Tqfp PinoutCY7C1373D Pin Configurations CE2 Pin Configurations Ball Fbga PinoutPin Definitions Burst Read Accesses Single Read AccessesSingle Write Accesses Functional OverviewZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Address Operation Used Partial Truth Table for Read/Write 2, 3Function CY7C1371D Function CY7C1373DIeee 1149.1 Serial Boundary Scan Jtag TAP Controller State Diagram TAP Controller Block DiagramTAP Instruction Set Bypass RegisterExtest Output Bus Tri-State TAP TimingSetup Times TAP AC Switching Characteristics Over the Operating Range10Parameter Description Min Max Unit Clock Output TimesParameter Description Conditions Min Max Unit TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions Scan Register Sizes Identification Register DefinitionsIdentification Codes Register Name Bit SizeBit # Ball ID Ball BGA Boundary Scan Order 13A10 B10 P10 Maximum Ratings Electrical CharacteristicsOperating Range Ambient RangeAC Test Loads and Waveforms Capacitance18Thermal Resistance18 133 MHz 100 MHz Parameter Description Unit Min Max Switching Characteristics Over the Operating Range23Read/Write Waveforms25, 26 Switching WaveformsRite ReadAddress NOP, Stall and Deselect Cycles25, 26Stall Stall NOPDON’T Care ZZ Mode Timing29Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall BGA 14 x 22 x 2.4 mm Ball Fbga 13 x 15 x 1.4 mm Document History Issue Orig. Description of Change Date