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| CY7C1266V18, CY7C1277V18 | |||
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| CY7C1268V18, CY7C1270V18 | |||
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Write Cycle Descriptions |
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The write cycle description table for CY7C1266V18 and CY7C1268V18 follows.[2, 8] |
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| BWS | 0/ |
| BWS | 1/ | K |
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| K |
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| NWS0 |
| NWS1 |
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| L |
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| – | During the data portion of a write sequence: |
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| CY7C1266V18 − both nibbles (D[7:0]) are written into the device. |
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| CY7C1268V18 − both bytes (D[17:0]) are written into the device. |
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| During the data portion of a write sequence: |
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| CY7C1266V18 − both nibbles (D[7:0]) are written into the device. |
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| CY7C1268V18 − both bytes (D[17:0]) are written into the device. |
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| CY7C1266V18 − only the lower nibble (D[3:0]) is written into the device, D[7:4] | remains unaltered. |
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| CY7C1268V18 − only the lower byte (D[8:0]) is written into the device, D[17:9] | remains unaltered. |
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| CY7C1266V18 − only the lower nibble (D[3:0]) is written into the device, D[7:4] | remains unaltered. |
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| CY7C1268V18 − only the lower byte (D[8:0]) is written into the device, D[17:9] | remains unaltered. |
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| CY7C1266V18 − only the upper nibble (D[7:4]) is written into the device, D[3:0] | remains unaltered. |
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| CY7C1268V18 − only the upper byte (D[17:9]) is written into the device, D[8:0] | remains unaltered. |
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| CY7C1266V18 − only the upper nibble (D[7:4]) is written into the device, D[3:0] | remains unaltered. |
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| CY7C1268V18 − only the upper byte (D[17:9]) is written into the device, D[8:0] | remains unaltered. |
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| – | No data is written into the devices during this portion of a write operation. |
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| H |
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| No data is written into the devices during this portion of a write operation. |
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Write Cycle Descriptions |
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The write cycle description table for CY7C1277V18 follows.[2, 8] |
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| BWS | 0 |
| K |
| K |
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| During the data portion of a write sequence, the single byte (D[8:0]) is written into the device. |
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| L |
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| During the data portion of a write sequence, the single byte (D[8:0]) is written into the device. |
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| H |
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| No data is written into the device during this portion of a write operation. |
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| H |
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| No data is written into the device during this portion of a write operation. |
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Note
8.Assumes a write cycle was initiated per the Write Cycle Descriptions tables. NWS0, NWS1, BWS0, BWS1, BWS2, and BWS3 can be altered on different portions of a write cycle, as long as the setup and hold requirements are met.
Document Number: | Page 10 of 27 |
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