Cypress CY7C1277V18 Write cycle description table for CY7C1270V18 follows.2, Into the device

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CY7C1266V18, CY7C1277V18

CY7C1268V18, CY7C1270V18

Write Cycle Descriptions

The write cycle description table for CY7C1270V18 follows.[2, 8]

 

BWS0

 

BWS1

 

BWS2

 

BWS3

K

 

K

Comments

 

L

 

L

 

L

 

L

L-H

 

During the data portion of a write sequence, all four bytes (D[35:0]) are written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device.

 

L

 

L

 

L

 

L

L-H

During the data portion of a write sequence, all four bytes (D[35:0]) are written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device.

 

L

 

H

 

H

 

H

L-H

 

During the data portion of a write sequence, only the lower byte (D[8:0]) is

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

written into the device. D[35:9] remains unaltered.

 

L

 

H

 

H

 

H

L-H

During the data portion of a write sequence, only the lower byte (D[8:0]) is

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

written into the device. D[35:9] remains unaltered.

 

H

 

L

 

H

 

H

L-H

 

During the data portion of a write sequence, only the byte (D[17:9]) is written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device. D[8:0] and D[35:18] remain unaltered.

 

H

 

L

 

H

 

H

L-H

During the data portion of a write sequence, only the byte (D[17:9]) is written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device. D[8:0] and D[35:18] remain unaltered.

 

H

 

H

 

L

 

H

L-H

 

During the data portion of a write sequence, only the byte (D[26:18]) is written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device. D[17:0] and D[35:27] remain unaltered.

 

H

 

H

 

L

 

H

L-H

During the data portion of a write sequence, only the byte (D[26:18]) is written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device. D[17:0] and D[35:27] remain unaltered.

 

H

 

H

 

H

 

L

L-H

 

During the data portion of a write sequence, only the byte (D[35:27]) is written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device. D[26:0] remains unaltered.

 

H

 

H

 

H

 

L

L-H

During the data portion of a write sequence, only the byte (D[35:27]) is written

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

into the device. D[26:0] remains unaltered.

 

H

 

H

 

H

 

H

L-H

 

No data is written into the device during this portion of a write operation.

 

 

 

 

 

 

 

 

 

 

 

 

H

 

H

 

H

 

H

L-H

No data is written into the device during this portion of a write operation.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document Number: 001-06347 Rev. *D

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Contents Selection Guide FeaturesConfigurations Functional DescriptionLogic Block Diagram CY7C1277V18 Logic Block Diagram CY7C1266V18Logic Block Diagram CY7C1270V18 Logic Block Diagram CY7C1268V18TMS TDI Pin ConfigurationsCY7C1266V18 4M x CY7C1277V18 4M xBWS CY7C1268V18 2M xCY7C1270V18 1M x QvldNegative Input Clock Input Pin DefinitionsPin Name Pin Description Synchronous Read/Write Input. WhenTCK Pin for Jtag Power Supply Inputs to the Core of the DevicePower Supply Inputs for the Outputs of the Device TDO for JtagFunctional Overview Operation Delay Lock Loop DLLApplication Example Truth TableDuring the data portion of a write sequence Write Cycle DescriptionsComments Remains unalteredInto the device. D 80 and D 3518 remain unaltered Write cycle description table for CY7C1270V18 follows.2Into the device Written into the device. D 359 remains unalteredIeee 1149.1 Serial Boundary Scan Jtag Idcode State diagram for the TAP controller follows.9 TAP Controller State DiagramGND ≤ VI ≤ VDD TAP Controller Block DiagramTAP Electrical Characteristics Parameter Description Test Conditions Min Max UnitTAP Timing and Test Conditions TAP AC Switching CharacteristicsRegister Name Bit Size Identification Register DefinitionsScan Register Sizes Instruction CodesBit # Bump ID Boundary Scan OrderDLL Constraints Power Up Sequence in DDR-II+ SramPower Up Sequence Power Up WaveformsOperating Range Electrical CharacteristicsDC Electrical Characteristics Maximum RatingsParameter Description Test Conditions Max Unit Capacitance20Thermal Resistance20 AC Test Loads and WaveformsLOW Switching CharacteristicsParameter Min Max HighNOP Switching WaveformsRead/Write/Deselect Sequence29 Ordering Information 333 Ball Fbga 15 x 17 x 1.40 mm Package DiagramVKN ECN No Issue Date Orig. Description of ChangeDocument History NXR