Cypress manual CY7C68033/CY7C68034 Silicon Features, Block Diagram

CY7C68033/CY7C68034

EZ-USB NX2LP-Flex™ Flexible USB NAND Flash Controller

CY7C68033/CY7C68034 Silicon Features

•Certified compliant for Bus- or Self-powered USB 2.0 operation (TID# 40490118)

•Single-chip, integrated USB 2.0 transceiver and smart SIE

•Ultra low power – 43 mA typical current draw in any mode

•Enhanced 8051 core

—Firmware runs from internal RAM, which is downloaded from NAND flash at startup

—No external EEPROM required

•15 KBytes of on-chip Code/Data RAM

—Default NAND firmware ~8 kB

—Default free space ~7 kB

•Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints

—Buffering options: double, triple, and quad

•Additional programmable (BULK/INTERRUPT) 64-byte endpoint

•SmartMedia Standard Hardware ECC generation with 1-bit correction and 2-bit detection

•GPIF (General Programmable Interface)

—Allows direct connection to most parallel interfaces

—Programmable waveform descriptors and configuration registers to define waveforms

—Supports multiple Ready (RDY) inputs and Control (CTL) outputs

•12 fully-programmable GPIO pins

•Integrated, industry-standard enhanced 8051

—48-MHz, 24-MHz, or 12-MHz CPU operation

—Four clocks per instruction cycle

—Three counter/timers

—Expanded interrupt system

—Two data pointers

•3.3V operation with 5V tolerant inputs

•Vectored USB interrupts and GPIF/FIFO interrupts

•Separate data buffers for the Set-up and Data portions of a CONTROL transfer

•Integrated I2C™ controller, runs at 100 or 400 kHz

•Four integrated FIFOs

—Integrated glue logic and FIFOs lower system cost

—Automatic conversion to and from 16-bit buses

—Master or slave operation

—Uses external clock or asynchronous strobes

—Easy interface to ASIC and DSP ICs

•Available in space saving, 56-pin QFN package

CY7C68034 Only Silicon Features:

•Ideal for battery powered applications

— Suspend current: 100 μA (typ.)

CY7C68033 Only Silicon Features:

•Ideal for non-battery powered applications

— Suspend current: 300 μA (typ.)

Block Diagram

24MHz Ext. Xtal

High-performance,

enhanced 8051 core with low power options

Connected for full-speed USB

Integrated full- and high-speed XCVR

			NX2LP-Flex
	x20	/0.5	8051 Core
		/1.0
	PLL		12/24/48 MHz,			I2C
		/2.0
			four clocks/cycle			Master
	VCC			(8)
	1.5k			Bus		Additional I/Os
			NAND
				(16)/Data
			Boot Logic
			(ROM)
						GPIF
				Address
D+	USB	CY	15 kB				RDY (2)
					ECC		CTL (3)
D–	2.0
	XCVR	Smart	RAM
		USB
		1.1/2.0
		Engine
						4 kB	8/16
						FIFO

Enhanced USB core	‘Soft Configuration’ enables	FIFO and USB endpoint memory
simplifies 8051 code	easy firmware changes	(master or slave modes)

General Programmable I/F to ASIC/DSP or bus standards such as 8-bit NAND, EPP, etc.

Up to 96 MB/s burst rate

Cypress Semiconductor Corporation	• 198 Champion Court • San Jose, CA 95134-1709	•	408-943-2600
Document #: 001-04247 Rev. *D	Revised September 21, 2006

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