Texas Instruments TMS320C6202 specifications Recommended operating conditions, MIN NOM MAX Unit

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TMS320C6202

FIXED-POINT DIGITAL SIGNAL PROCESSOR

SPRS072B ± AUGUST 1998 ± REVISED AUGUST 1999

absolute maximum ratings over operating case temperature range (unless otherwise noted)²

Supply voltage range, CVDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 0.3 V to 2.3 V Supply voltage range, DVDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V to 4 V Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V to 4 V

Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V to 4 V

Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0_C to 90_C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±55_C to 150_C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to VSS.

recommended operating conditions

INFORMATION

CVDD

Supply voltage

DVDD

Supply voltage

VSS

Supply ground

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

IOL

Low-level output current

TC

Operating case temperature

MIN

NOM

MAX

UNIT

 

 

 

 

1.71

1.8

1.89

V

3.14

3.30

3.46

V

0

0

0

V

2.0

 

 

V

 

 

0.8

V

 

 

±8

mA

 

 

8

mA

0

 

90

_C

 

 

 

 

ADVANCE

electrical characteristics over recommended ranges of supply voltage and operating case temperature (unless otherwise noted)

 

PARAMETER

 

 

 

 

TEST CONDITIONS

MIN

TYP

MAX

UNIT

 

 

 

 

 

 

 

 

VOH

High-level output voltage

DVDD = MIN,

IOH = MAX

2.4

 

 

V

VOL

Low-level output voltage

DVDD = MIN,

IOL = MAX

0.6

V

I

Input current³

V = V

SS

to DV

DD

±10

uA

I

 

I

 

 

 

 

 

 

IOZ

Off-state output current

VO = DVDD or 0 V

±10

uA

I

Supply current, CPU + CPU memory access§

CV

DD

= NOM,

CPU clock = 200 MHz

 

TBD

mA

DD2V

 

 

 

 

 

 

 

 

 

I

Supply current, peripherals

CV

DD

= NOM,

CPU clock = 200 MHz

 

TBD

mA

DD2V

 

 

 

 

 

 

 

 

 

IDD3V

Supply current, I/O pins#

DVDD = NOM,

CPU clock = 200 MHz

 

TBD

mA

Ci

Input capacitance

 

 

 

 

 

 

10

pF

Co

Output capacitance

 

 

 

 

 

 

10

pF

³TMS and TDI are not included due to internal pullups. TRST is not included due to internal pulldown. § Measured with average CPU activity:

50% of time:

8 instructions per cycle, 32-bit DMEM access per cycle

50% of time:

2 instructions per cycle, 16-bit DMEM access per cycle

Measured with average peripheral activity:

50% of time:

Timers at max rate

 

McBSPs at E1 rate

 

DMA burst transfer between DMEM and SDRAM

50% of time:

Timers at max rate

 

McBSPs at E1 rate

 

DMA servicing McBSPs

# Measured with average I/O activity (30-pF load, SDCLK on):

25% of time:

Reads from external SDRAM

25% of time:

Writes to external SDRAM

50% of time:

No activity

 

 

 

 

28

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Contents Advance Information FIXED-POINT Digital Signal Processor Characteristics Description Device characteristicsDescription Functional block diagram Timers Data Memory Interrupt SelectorCPU EmifCPU description Timers Bit Data C62x CPUControl RegistersLD1 Signal groups description EMU1 EMU0 RSV4 RSV3RSV2 RSV1 RSV0 Clock/PLL Ieee Standard 1149.1CE3 CE2 CE1CE0 BE3 Hold BE2XD310 XBE3/XA5 XBE2/XA4 XBE1/XA3 XBE0/XA2 Xrdy Xhold XholdaFIXED-POINT Digital Signal Processor TMS320C6202Signal PIN no TYPE² Description Name GJL GLS Expansion BUS Emif ± Address Signal PIN no TYPE² Description Name GJL GLS Emif ± Address Emif ± DataTimers Emif ± BUS ArbitrationMultichannel Buffered Serial Port 0 McBSP0 Multichannel Buffered Serial Port 1 McBSP1Multichannel Buffered Serial Port 2 McBSP2 Signal PIN no TYPE² Description Name GJL GLSReserved for Test AD6 AE7AE8 CvddAB4 AC3AC4 AC5 CvddVSS Ground PinsGND Signal PIN no TYPE² Description Name GJL GLS Ground Pins AF10 Development Tool Platform Part Number Development supportScsi TMDS00510WS TMS Temperature Range Default 0 C to 90 C Prefix Device Speed RangeDevice Family Package Type ² Documentation support Advance Information Power-supply sequencing Clock PLLMIN NOM MAX Unit Recommended operating conditionsParameter Test Conditions MIN TYP MAX Unit Signal transition levels Parameter Measurement InformationIOL IOHInput and Output Clocks Timing requirements for CLKIN² see FigureTiming requirements for Xclkin ²³ see Figure Clkmode Unit MIN MAXSwitching characteristics for CLKOUT1²³ see Figure Switching characteristics for CLKOUT2 ³ see FigureParameter Clkmode =Switching characteristics for XFCLK²³ see Figure Xfclk TimingsAsynchronous Memory Timing AWECEx BE30 EA212 ED310 Setup = Strobe = Not ready = Hold =AOE Are AWE Ardy SYNCHRONOUS-BURST Memory Timing Unit MIN MAXCEx BE30 BE1 BE2 BE3 BE4EA212 ED310 SDCAS/SSADS² SDRAS/SSOE² SDWE/SSWE²Synchronous Dram Timing Timing requirements for synchronous Dram cycles see FigureRead CLKOUT2 BE1 BE2 BE3CA1 CA2 CA3 SDA10 SDRAS/SSOE ² SDCAS/SSADS² SDWE/SSWE²Actv SDRAS/SSOE² SDCAS/SSADS² SDWE/SSWE²Dcab SDA10 SDRAS/SSOE² SDCAS/SSADS² SDWE/SSWE²MRS Refr CLKOUT2SDA10 SDRAS/SSOE ² SDCAS/SSADS ² SDWE/SSWE ² HOLD/HOLDA Timing Timing requirements for HOLD/HOLDA cycles ² see FigureHold Holda Emif Bus² DSP Owns BusReset Timing Timing requirements for reset see FigureSwitching characteristics during reset¶ see Figure Reset CLKOUT1FIXED-POINT Digital Signal Processor EXTINTx, NMI Intr Flag External Interrupt TimingINUMx Expansion BUS Synchronous Fifo Timing MIN MAX UnitParameter MIN MAX Unit XA1 XA2 XA3 XA4 XOE XRE XWE/XWAIT §XA1 XOE XRE XWE/XWAIT³XA2 XA3XA4 XA3 XA4 XOE XRE XWE/XWAIT ³Expansion BUS Asynchronous Peripheral Timing XOE XRE XWE/XWAIT ³ Xrdy § XCEx XBE30/XA52 ² XD310XOE XRE XWE/XWAIT ³ XRDY§ Expansion BUS Synchronous Host Port Timing Xclkin XCS XAS Xcntl XW/R ² XBE30/XA52 ³Xblast § XRDY¶Xclkin XCS XAS Xcntl XW/R² XBE30/XA52³XBLAST§ XBE1 XBE2 XBE3 XBE4TdXCKIH-XASV Delay time, Xclkin high to Valid 15.5 Xblast ³ Xclkin XASXrdy XWE/XWAIT ¶ XBE30/XA52 § Addr XD310 Xrdy Xboff Xhold ¶ Xholda ¶ Xhold # Xholda #Expansion BUS Asynchronous Host Port Timing XCS XcntlXBE30/XA52 ² XR/W ³ XD310 Word XrdyExternal Device as Asynchronous MasterÐWrite XBE30/XA52² XR/W ³ XD310 WordDSP Owns Bus External Requestor Xhold input XHOLD/XHOLDA TimingXBus ² C6202 Expansion Bus ArbitrationÐInternal Arbiter Disabled Xhold output Xholda input XBus ² C6202Multichannel Buffered Serial Port Timing Timing requirements for McBSP²³ see FigureSwitching characteristics for McBSP²³ see Figure Clks Clkr FSR intBitn-1 ClkxClks Timing requirements for FSR when Gsync = 1 see FigureFSR external CLKR/X no need to resync CLKR/Xneeds resync Master Slave MIN MAX Master § Slave MIN MAXClkx FSX Bit Bitn-1McBSP Timing as SPI Master or Slave Clkstp = 11b, Clkxp = MASTER§ Slave MIN MAX FIXED-POINT Digital Signal Processor McBSP Timing as SPI Master or Slave Clkstp = 11b, Clkxp = DMAC, TIMER, POWER-DOWN Timing Switching characteristics for Dmac outputs² see FigureTiming requirements for timer inputs ² see Figure Switching characteristics for timer outputs² see FigureSwitching characteristics for power-down outputs² see Figure TwPDH Pulse duration, PD high 10PSwitching characteristics for Jtag test port see Figure DTCKL-TDOV Delay time, TCK low to TDO validJtag TEST-PORT Timing Timing requirements for Jtag test port see FigureThermal resistance characteristics S-PBGA package Mechanical Data18,10 16,80 TYP 17,90 Heat Slug80 MAX 4188959/B 12/98Important Notice
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