Intel 273246-002 manuals
Personal Care > Medical Alarms
When we buy new device such as Intel 273246-002 we often through away most of the documentation but the warranty.
Very often issues with Intel 273246-002 begin only after the warranty period ends and you may want to find how to repair it or just do some service work.
Even oftener it is hard to remember what does each function in Medical Alarms Intel 273246-002 is responsible for and what options to choose for expected result.
Fortunately you can find all manuals for Medical Alarms on our side using links below.
100 pages 1.58 Mb
3 Contents1 About This Manual 2 Getting Started 3 Theory of Operation 4 4 Hardware Reference 5 BIOS Quick Reference A PLD Code Listing B Bill of Materials C Schematics Index 5 FiguresTables 7 About This Manual11 Getting Started19 Theory of Operation27 Hardware Reference41 BIOS Quick Reference57 PLD Code Listing A59 Bill of Materials B65 Schematics C66 Evaluation PlatformSystem Electronics Board68 Mini PCI ConnectorNote:GFBCLK must be 3.0" longer than GCKOUT 69 CPU Connector70 Socket 071 Socket 172 Socket 2Note: J16 is not populatedDIMM2Stuff only to enable These caps can be tuned to 73 Note: R11 and R12 should be placed aslengths should be equal. caps close to crystal. All lead Keep crystal close to clock and TX/Pentium Designs. Note only three DIMMS are supported. BX/PentiumII Designs. Note This circuit is only used for stopping of clocks two DIMMS are supported. change delay through buffer. close as possible to U1 Clocks 74 ISA Pullups PCI Pullupsis on PIIX4 page Note IRQ8 Pull-up ISA/PCI Pullups 75 PCI SLOT 0 PCI SLOT 1 -12V: B1 J7/J8 +12V: A2 B57 B3, B12, B13, B15, B17, B28, B34, B38, B46, B49, A12, A13, A18, A24, A30, A35, A37, A42, A48, A56 J7/J8 GND: B10, B14 A9, A11, A14, A19 J7/J8 NC: B25, B31, B36, B41, B43, B54 A21, A27, A33, A39 A45, A53 J7/J8 V3_3: B5, B6, B19, B22, B59, B61, B62 A5, A8, A10, A16, A59, A61, A62 | A1, A3, A4 J7/J8 V5_0: PCI Slots 0 & 1 76 PCI SLOT 2PCI Slot 2 77 Stub length from connector to resistorPin A3 is tied to ground per AGP Specification must be less than 0.1" AGP Connector Note: U14, C203,C215, C210 , R50PIIX4 is PCI is not applied to device. ISA/EIO IDE PCIwhen in suspend and power from being powered by IRQ#8 This circuit is to prevent IOAPIC device #8 and R51 are not populated 78 PIIX4CPU Module must drive 1-2 Normal Operation should be equal Trace lengths caps close to crystal Keep crystal close to PIIX4 and 0V = Pentium 3.3V = PentiumII processor type. CONFIG1l to indicate 2-3 Clear CMOS PIIX4 Part 2 79 DMA/IRQUSB INTERFACE POWER MGMT. CPU SYSTEM X-BUS 80 Primary IDE ConnectorSecondary IDE Connector HD Active LED IDE ConnectorsPULL romCs# high so as not to Install only one 81 Floppy configure IRQs BIOS needs to enable and This disables the ROM buffers. Do not stuff address Install for 3F0 Config address Install for 370 Config interfere with boot rom! resistor! Super I/O Uarts Parallel ISA/Host82 NOTE 1: USB differential traces route together (Z0- & Z0+) and (Z1- & Z1+).TOP of Stacked of USB Connector stack Place these caps within 1 inch Poly fuses should be in range USB Connector BOTTOM of Stacked 8Ohm/100MHz/500mA max 5A. NOTE 4: Poly-fuse min 1.5A NOTE 3: Place ferrites at connector. Stripline width 0.015 (1 oz) Routed Together PCB Trace 45 Ohm Matched, Possible to PIIX4 Place As Close as NOTE 2: Protect differential traces w/ guard traces orOhm Stripline width 0.015 (1 oz) 44.88/45.45 PCB Trace 45 Ohm Matched, Routed Together Stripline width 0.015 (for 1 oz)->44.88/45.45 Ohm. Must be 45 Ohm Matched double space to any other signal. Possible to PIIX4 Place As Close as 44.88/45.45 Ohm USB Connector of 1.5A to 5A USB Connectors 83 ISA SlotsJ5/J6 V5_0: Note Cap Direction Note Cap Direction -12V B07 J5/J6: +12V B09 B01, B10, D18 B03, B29, B31, D16 J5/J6 GND: -5V B05 ISA Connectors 84 COM0/COM1FLOPPY PARALLELCOM0 COM1COMx, DB25, Floppy 85 Port 80Expect All 0's except Option Stuff SA7=1 for P80 Decode Standard BIOS/ Port 80 Power IndicatorsOpen Collector Note Cap Direction Place at ATX Connector Place at ATX Connector 86 SPEAKER HEADERPS_OK = OR of PW_OK,-DBRESET,RESET SWITCH Note: Add screen marking for V5_0 LED, V3_3 LED AXT Power Connector 87 Unused Gates Revision 88 Celeron(TM) Processorin PPGA Daughter Board
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