Intel 273246-002 manual PCI Slot

4

3

2

A B C D E

J7/J8 V5_ 0:
A5, A8, A10, A16, A59, A61, A62									A1, A3, A4
B5,	B6,	B19,		B22,		B59,		B61, B62
J7/J8 V3_ 3:
A21,	A27,		A33,		A39		A45, A53
B25,	B31,		B36,		B41,		B43, B54

J7/J8 NC:

A9, A11, A1 4, A19

B10, B14

J7/J8 GND:

A12, A13, A18, A24, A30, A35, A37, A42, A48, A56

B3, B12, B13, B15, B17, B28, B34, B38, B46, B49,

B57

J7/J8 +12V: A2 -12V: B1

V 5 _ 0

V 3 _ 3

V 5 _ 0

V 3 _ 3

C55

C 1 1 6

C85

C73

C 1 1 3

C66

C 1 1 9

C 1 0 6

C90

C56

0

C 1 1 7

C 1 1 4

C86

C74

C67

C 1 2 0

C91

C 1 0 7

1 0 u F

0 . 1uF

0 . 1uF

0 . 1uF

0 . 01uF

0 . 01uF

1 0 u F

0 . 1uF

0 . 1uF

1 0 u F

. 1uF

0 . 1uF

0 . 1uF

0 . 01uF

0 . 01uF

1 0 u F

0 . 1uF

0 . 1uF

3,4,11,13

AD[31:0]

AD[31:0]

3,4,11,13

-C/BE[3:0]

-C/BE[3:0]

J7

J8

B 1

- 12V

T R S T

A 1

PCI _ TRST

1 1

PCI _ TCLK

B 1

- 12V

T R S T

A 1

PCI _ TRST

1 1 PCI _ TCLK

B 2

A 2

B 2

A 2

T C K

+ 1 2 V

T C K

+ 1 2 V

PCI _ TMS

B 3

A 3

PCI _ TMS

1 1

B 3

A 3

GND

T M S

GND

T M S

B 4

A 4

B 4

A 4

PCI_TDI

T D O

TDI

PCI_TDI

1 1

T D O

TDI

B 5

A 5

B 5

A 5

V 5 _ 0

V 5 _ 0

V 5 _ 0

V 5 _ 0

PIRQD#

B 6

A 6

PIRQA#

3,9,11,13,14

B 6

A 6

V 5 _ 0

INTA

V 5 _ 0

INTA

B 7

A 7

PIRQA#

B 7

A 7

PIRQB#

3,9,11,12,13,14

PIRQB#

INTB

INTC

PIRQC#

3,9,11,12,13,14

INTB

INTC

B 8

A 8

PIRQC#

B 8

A 8

3,9,11,13,14

PIRQD#

INTD

V 5 _ 0

INTD

V 5 _ 0

B 9

A 9

B 9

A 9

PRSNT1

NC

PRSNT1

NC

B 1 0

A 1 0

B 1 0

A 1 0

NC

V 5 _ 0

NC

V 5 _ 0

B 1 1

A 1 1

B 1 1

A 1 1

C77

PRSNT2

NC

C78

C81

PRSNT2

NC

B 1 2

A 1 2

B 1 2

A 1 2

GND

GND

GND

GND

0 . 01uF

B 1 3

A 1 3

0 . 01uF

0 . 01uF

B 1 3

A 1 3

C80

B 1 4

GND

GND

A 1 4

B 1 4

GND

GND

A 1 4

0 . 01uF

B 1 5

NC

NC

A 1 5

-PCIRST

3,4,11,12,13

B 1 5

NC

NC

A 1 5

-PCIRST

GND

R S T

GND

R S T

B 1 6

A 1 6

B 1 6

A 1 6

PCICLK1

CLK

V 5 _ 0

8

PCICLK2

CLK

V 5 _ 0

B 1 7

A 1 7

B 1 7

A 1 7

8

PCICLK1

GND

G N T

- P G N T 0

4,9

GND

G N T

- P G N T 1

4,9

B 1 8

A 1 8

B 1 8

A 1 8

4,9,13

- PREQ0

R E Q

GND

4,9,13

- PREQ1

R E Q

GND

B 1 9

A 1 9

B 1 9

A 1 9

AD31

V 5 _ 0

NC

AD30

AD28

AD31

V 5 _ 0

NC

AD30

AD29

B 2 0

A 2 0

B 2 0

A 2 0

AD[31]

AD[30]

AD[31]

AD[30]

AD29

B 2 1

A 2 1

AD29

B 2 1

A 2 1

AD[29]

V 3 _ 3

AD28

AD[29]

V 3 _ 3

AD28

B 2 2

A 2 2

B 2 2

A 2 2

GND

AD[28]

GND

AD[28]

AD27

B 2 3

A 2 3

AD26

R12

AD27

B 2 3

A 2 3

AD26

R13

AD[27]

AD[26]

AD[27]

AD[26]

AD25

B 2 4

A 2 4

2 2 0

AD25

B 2 4

A 2 4

2 2 0

AD[25]

GND

AD[25]

GND

-C/BE3

B 2 5

A 2 5

AD24

-C/BE3

B 2 5

A 2 5

AD24

V 3 _ 3

AD[24]

PCIA2

V 3 _ 3

AD[24]

PCIB2

B 2 6

A 2 6

B 2 6

A 2 6

AD23

C/BE3

IDSEL

AD23

C/BE3

IDSEL

B 2 7

A 2 7

B 2 7

A 2 7

AD[23]

V 3 _ 3

AD22

AD[23]

V 3 _ 3

AD22

B 2 8

A 2 8

B 2 8

A 2 8

GND

AD[22]

GND

AD[22]

AD21

B 2 9

A 2 9

AD20

AD21

B 2 9

A 2 9

AD20

AD[21]

AD[20]

AD[21]

AD[20]

AD19

B 3 0

A 3 0

AD19

B 3 0

A 3 0

AD[19]

GND

AD18

AD[19]

GND

AD18

B 3 1

A 3 1

B 3 1

A 3 1

V 3 _ 3

AD[18]

V 3 _ 3

AD[18]

AD17

B 3 2

A 3 2

AD16

AD17

B 3 2

A 3 2

AD16

AD[17]

AD[16]

AD[17]

AD[16]

-C/BE2

B 3 3

A 3 3

-C/BE2

B 3 3

A 3 3

C/BE2

V 3 _ 3

C/BE2

V 3 _ 3

- FRAME

B 3 4

A 3 4

- FRAME

3,4,9,11,13

B 3 4

A 3 4

GND

FRAME

-IRDY

GND

FRAME

B 3 5

A 3 5

B 3 5

A 3 5

3,4,9,11,13

-IRDY

IRDY

GND

IRDY

GND

- TRDY

B 3 6

A 3 6

- TRDY

3,4,9,11,13

B 3 6

A 3 6

V 3 _ 3

TRDY

- DEVSEL

V 3 _ 3

TRDY

B 3 7

A 3 7

B 3 7

A 3 7

3,4,9,11,13

- DEVSEL

DEVSEL

GND

DEVSEL

GND

- S T O P

B 3 8

A 3 8

- S T O P

3,4,9,11,13

B 3 8

A 3 8

GND

S T O P

- PLOCK

GND

S T O P

3,4,9,11

- PLOCK

B 3 9

A 3 9

B 3 9

A 3 9

L O C K

V 3 _ 3

L O C K

V 3 _ 3

B 4 0

A 4 0

SDONE

9,11

- PERR

B 4 0

A 4 0

SDONE

3,9,11

- PERR

PERR

SDONE

PERR

SDONE

B 4 1

A 4 1

- SERR

B 4 1

A 4 1

- S B O

3,4,9,11,13

- SERR

V 3 _ 3

S B O

- S B O

9,11

V 3 _ 3

S B O

B 4 2

A 4 2

B 4 2

A 4 2

PAR

-C/BE1

SERR

GND

PAR

3,4,9,11,13

-C/BE1

SERR

GND

B 4 3

A 4 3

B 4 3

A 4 3

V 3 _ 3

PAR

AD15

V 3 _ 3

PAR

AD15

B 4 4

A 4 4

B 4 4

A 4 4

AD14

C/BE1

AD[15]

AD14

C/BE1

AD[15]

B 4 5

A 4 5

B 4 5

A 4 5

AD[14]

V 3 _ 3

AD13

AD[14]

V 3 _ 3

AD13

B 4 6

A 4 6

B 4 6

A 4 6

GND

AD[13]

GND

AD[13]

AD12

B 4 7

A 4 7

AD11

AD12

B 4 7

A 4 7

AD11

AD[12]

AD[11]

AD[12]

AD[11]

AD10

B 4 8

A 4 8

AD10

B 4 8

A 4 8

AD[10]

GND

AD9

AD[10]

GND

AD9

B 4 9

A 4 9

B 4 9

A 4 9

GND

AD[09]

GND

AD[09]

AD8

B 5 2

AD[08]

C/BE0

A 5 2

AD8

B 5 2

AD[08]

C/BE0

A 5 2

AD7

B 5 3

A 5 3

AD7

B 5 3

A 5 3

AD[07]

V 3 _ 3

AD6

AD[07]

V 3 _ 3

AD6

B 5 4

A 5 4

B 5 4

A 5 4

AD5

B 5 5

V 3 _ 3

AD[06]

A 5 5

AD4

AD5

B 5 5

V 3 _ 3

AD[06]

A 5 5

AD4

AD[05]

AD[04]

AD[05]

AD[04]

AD3

B 5 6

A 5 6

AD3

B 5 6

A 5 6

AD[03]

GND

AD2

AD[03]

GND

AD2

B 5 7

A 5 7

B 5 7

A 5 7

GND

AD[02]

GND

AD[02]

AD1

B 5 8

A 5 8

AD0

AD1

B 5 8

A 5 8

AD0

AD[01]

AD[00]

AD[01]

AD[00]

B 5 9

A 5 9

B 5 9

A 5 9

V 5 _ 0

V 5 _ 0

ACK64#

V 5 _ 0

V 5 _ 0

R E Q 6 4 #

B 6 0

A 6 0

R E Q 6 4 #

9,11

B 6 0

A 6 0

9,11 ACK64#

ACK64

R E Q 6 4

ACK64

R E Q 6 4

B 6 1

A 6 1

B 6 1

A 6 1

V 5 _ 0

V 5 _ 0

V 5 _ 0

V 5 _ 0

B 6 2

A 6 2

B 6 2

A 6 2

V 5 _ 0

V 5 _ 0

V 5 _ 0

V 5 _ 0

-C/BE0 PCI Conn -C/BE0 PCI Conn

4

3

2

1

PCI SLOT 0

PCI SLOT 1

1

THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT
BEEN VERIFIED FOR MANUFACTURING AS AN ENDUSER
	Title
PRODUCT. INTEL IS NOT RESPONSIBLE FORTHE		PCI Slots 0 & 1
MISUSE OF THIS INFORMATIO.	Size	Document Number		Rev
	C	{Doc}		D
	Date:	Thursday, February 25, 1999	Sheet 1 0 of 2 2

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