Motorola MVME2300 Series manuals

282 pages2.61 Mb

3Safety Summary
- Ground the Instrument.
- Do Not Operate in an Explosive Atmosphere.
- Keep Away From Live Circuits Inside the Equipment.
- Use Caution When Exposing or Handling a CRT.
- Do Not Substitute Parts or Modify Equipment.
- Observe Warnings in Manual.
- Warning
Flammability
4!
- EMI Caution
!
- Lithium Battery Caution
- 5CE Notice (European Community)
- Notice
- 6Limited and Restricted Rights Legend
7Contents
15List of Figures
17List of Tables
19About This Manual
- 20Summary of Changes
- 21Overview of Contents
- Comments and Suggestions
- 22Conventions Used in This Manual
251Board Description and Memory Maps
- Overview
- 26Summary of Features
- 27System Block Diagram
  - on P2
  - Table 1-1. Features: MVME2300 Series (Continued)
    - System Block Diagram
  - 29Figure 1-1. MVME2300 Series System Block Diagram
    - http://www.motorola.com/computer/literature 1-5
  - 30VMEbus Interface
  - Front Panel
  - PCI interface
- 31Programming Model
  - Processor Memory Maps
  - 37PCI Memory Maps
  - 44VMEbus Mapping
    - The register values in the table yield the following VMEbus slave map:
  - 48Falcon-Controlled System Registers
    - The following subsections describe these system registers in detail.
    - Table 1-14. VMEbus Slave Map Example
    - Table 1-15. System Register Summary
      - http://www.motorola.com/computer/literature 1-27
    - FIELD
    - 51M_SIZE[0:1] Memory Size. This field is encoded as follows:
    - REG Memory Configuration Register - $FEF80404 BIT
    - OPER RESET
- 55ISA Local Resource Bus
  - W83C553 PIB Registers
  - 16550 UART
  - 56General-Purpose Readable Jumpers
  - NVRAM/RTC and Watchdog Timer Registers
  - 57Module Configuration and Status Registers
  - 61VME Registers
  - 67Emulated Z8536 CIO Registers and Port Pins
  - 69ISA DMA Channels
    - No ISA DMA channels are implemented on MVME2300 series boards.
    - Table 1-21. Z8536 CIO Port Pin Assignments (Continued)
712Raven PCI Bridge ASIC
- 72Block Diagram
  - Block Diagram
    - MPC Bus
    - PCI Bus
    - Raven
  - 73Figure 2-1. Raven Block Diagram
    - http://www.motorola.com/computer/literature 2-3
  - 742Functional Description
  - MPC Bus Interface
    - 77Table 2-2. Command Types MPC Slave Response
  - 802
  - PCI Interface
  - 942
  - 95Endian Conversion
    - 2-26 Computer Group Literature Center Web Site
    - Raven PCI Bridge ASIC
  - 962
    - Figure 2-7. Big- to Little-Endian Data Swap
  - 98Error Handling
  - 99Transaction Ordering
  - 2
- 100Raven Registers
  - MPC Registers
    - 101Table 2-7. Raven MPC Register Map
    - 102Vendor ID/Device ID Registers
    - Table 2-7. Raven MPC Register Map (Continued)
    - 103Revision ID Register
  - 1062
    - This register is not used in MVME2300 series boards. Prescaler Adjust Register
  - 1122
    - figure:
    - 113PCI Interrupt Acknowledge Register
  - 1162
  - 117PCI Registers
  - 1182
    - 119Table 2-9. Raven PCI I/O Register Map
    - Vendor ID/ Device ID Registers
  - 1202
  - 1222
  - 1262
    - Perspective from the MPC bus in Big-Endian mode
  - 1282
    - 129Conceptual perspective from the PCI bus
    - Perspective from the MPC bus in Big-Endian mode
    - Perspective from the MPC bus in Little-Endi an mode
  - 1302Raven Interrupt Controller
  - Features
  - Architecture
  - 1342
  - 135Block Diagram Description
  - 1382
  - 139MPIC Registers
  - 1442
    - 145Vendor Identification Register
  - 1462
    - 147Spurious Vector Register
  - 1482
  - 1542
  - 157Programming Notes
  - 1602
  - 161Architectural Notes
1633Falcon ECC Memory Controller Chip Set
- 3-2 Computer Group Literature Center Web Site
- 164Block Diagrams
  - Figure 3-1. Falcon Pair Used with DRAM in a System
    - Block Diagrams
  - Figure 3-2. Falcon Internal Data Paths (Simplified)
    - http://www.motorola.com/computer/literature 3-3
165+ +
- 166Figure 3-3. Overall DRAM Connections
  - 3-4 Computer Group Literature Center Web Site
    - LOWER FALCON
    - UPPER FALCON
- 167Bit Ordering Convention
- Performance
- 173x
  - PowerPC 60
  - Bus Interface
  - 174ECC
    - Functional Description
    - http://www.motorola.com/computer/literature 3-13
    - 175Notes 1. No opportunity for error, since no read of DRAM occurs during a four-beat write.
    - Table 3-7. Error Reporting
      - Error Type Single-Beat/ Four-Beat Read Single-Beat Write Four-Beat Write Scrub Single-Bit Error
      - Double-Bit Error
      - Triple- (or greater) Bit Error
  - 176DRAM Tester
  - ROM/Flash Interface
    - 178Table 3-8. PowerPC 60
    - to ROM/Flash Address Mapping ROM/Flash 16 Bits Wide (8 Bits per Falcon)
    - 179Table 3-9. PowerPC 60
    - to ROM/Flash Address Mapping ROM/Flash 64 Bits Wide (32 Bits per Falcon)
  - 180Refresh/Scrub
  - 182DRAM Arbitration
  - Chip Defaults
  - External Register Set
  - CSR Accesses
- 183Programming Model
  - CSR Architecture
    - 186Figure 3-6. Memory Map for Byte Reads to CSR
      - 3-24 Computer Group Literature Center Web Site
      - http://www.motorola.com/computer/literature 3-25
    - 187Figure 3-7. Memory Map for Byte Writes to Internal Register Set and Test SRAM
      - 3-26 Computer Group Literature Center Web Site
    - 188Figure 3-8. Memory Map for 4-Byte Reads to CSR
    - Figur e 3-9 . Memory Map for 4-Byte Writes to Internal Register Set and Test SRAM
  - 189Register Summary
  - Detailed Register Bit Descriptions
    - 3-28 Computer Group Literature Center Web Site
    - 190Table 3-10. Register Summary
      - TEST D0 (Lower 32 Bits)
      - ERROR_SYNDROME
      - REVID
      - VENDID DEVID
      - SBE COUNT
      - ERROR_ADDRESS
      - ROW ADDRESS COL ADDRESS
      - TEST PC TEST IR
      - TEST A0
      - TEST A1
      - TEST D0 (Upper 8 Bits)
      - TEST D0 (Middle 32 Bits)
    - 191Table 3-10. Register Summary (Continued)
      - http://www.motorola.com/computer/literature 3-29
    - 192Table 3-10. Register Summary (Continued)
    - 194,
      - 195DRAM Attributes Register
      - Caution
      - 197DRAM Base Register
      - 205Scrub/Refresh Register
      - Table 3-13. rtest Encodings
    - 208rom_a_rv
    - rom_b_rv
      - 213Power-Up Reset Status Register 1
- 215Software Considerations
  - Parity Checking on the PowerPC Bus
  - Programming ROM/Flash Devices
  - Writing to the Control Registers
  - 216Sizing DRAM
    - 218Table 3-19. PowerPC 60
    - Address to DRAM Address Mappings
  - 219ECC Codes
  - 2203
    - Table 3-20. Syndrome Codes Ordered by Bit in Error
      - Software Considerations
      - http://www.motorola.com/computer/literature 3-59
    - 221Table 3-21. Single-Bit Errors Ordered by Syndrome Code
      - 3-60 Computer Group Literature Center Web Site
  - 222Data Paths
    - Figure 3-10. PowerPC Data to DRAM Data Correspondence
    - 223Table 3-22. PowerPC Data to DRAM Data Mapping
- 2254Universe (VMEbus to PCI) Chip
  - 227Block Diagram
- 2455Programming Details
  - PCI Arbitration
    - 5-2 Computer Group Literature Center Web Site
    - Programming Details
  - 246Interrupt Handling
    - Figure 5-1. MVME2300 Series Interrupt Architecture
    - 247RavenMPIC
    - 2485
    - 8259 Interrupts
      - Interrupt Handling
      - http://www.motorola.com/computer/literature 5-5
      - 249Figure 5-2. PIB Interrupt Handler Block Diagram
  - 251ISA DMA Channels
  - 252Exceptions
    - Sources of Reset
    - 253Soft Reset
    - Universe Chip Problems after PCI Reset
    - 254Error Notification and Handling
  - 255Endian Issues
    - 5-12 Computer Group Literature Center Web Site
    - Programming Details
      - 60X System Bus
      - VMEbus
    - 256Figure 5-4. Little-Endian Mode
      - PCI Local Bus
    - 257Processor/Memory Domain
    - Role of the Raven ASIC
    - PCI Domain
    - 258Role of the Universe ASIC
    - VMEbus Domain
  - 259ROM/Flash Initialization
261A
- ARelated Documentation
  - Motorola Computer Group Documents
  - 262Manufacturers Documents
  - 264Related Specifications
  - 267Glossary
  - 275Index
    - Numerics
    - A
    - B
    - C
    - 276D
    - E
    - F
    - 277G
    - H
    - I
    - J
    - L
    - M
    - 278N
    - P
    - 279R
    - 281S
    - 282T
    - U
    - V
    - W
    - Z