Motorola MVME2300 Series manual Error Reporting, Single-Bit

Functional Description

Error Reporting

The Falcon pair checks data from the DRAM during single- and four-beat reads, during single-beat writes, and during scrubs. Table 3-7shows the actions taken by the Falcon pair for different errors during these accesses.

Note that the Falcon pair does not assert TEA_ on double-bit errors. In fact, the Falcon pair does not have a TEA_ signal pin and it assumes that the system does not implement TEA_. The Falcon can, however, assert machine check (MCP_) on double-bit errors.

Table 3-7. Error Reporting

Error Type	Single-Beat/	Single-Beat Write	Four-Beat Write	Scrub
	Four-Beat Read
	Terminate the	Terminate the		This cycle is not seen on
	PowerPC 60x bus cycle	PowerPC 60x bus cycle		the PowerPC 60x bus.
	normally.	normally.
Single-Bit	Provide corrected data to	Correct the data read		Write corrected data
	the PowerPC 60x bus	from DRAM, merge with	N/A 1	back to DRAM if so
Error	master.	the write data, and write		enabled.
		the corrected, merged
		data to DRAM.
	Assert INT_ if so	Assert INT_ if so		Assert INT_ if so
	enabled.	enabled.		enabled.
	Terminate the	Terminate the		This cycle is not seen on
	PowerPC 60x bus cycle	PowerPC 60x bus cycle		the PowerPC 60x bus.
	normally.	normally.
	Provide miss-corrected,	Do not perform the write	N/A 1	Do not perform the
Double-Bit	raw DRAM data to the	portion of the read-		write portion of the
	PowerPC 60x bus master.	modify-write cycle to		read-modify-write cycle
Error
		DRAM.		to DRAM.
	Assert INT_ if so
	enabled.	Assert INT_ if so		Assert INT_ if so
	Assert MCP_ if so	enabled.		enabled.
	enabled.	Assert MCP_ if so
		enabled.
Triple- (or	Some of these errors are	detected correctly and are	treated the same as double-	bit errors. The rest could
greater)	show up as “no error” or “single-bit error”, both of which are incorrect.
Bit Error

Notes 1. No opportunity for error, since no read of DRAM occurs during a four-beat write.

3

http://www.motorola.com/computer/literature 3-13