Functional Description

2.The base address for each block is software programmable. At reset, Block A’s base address is $FF000000 and Block B’s base address is $FF400000.

As noted above, in addition to appearing at the programmed base address, the first 1Mbyte of Block A/B also appears at $FFF00000- $FFFFFFFF if the reset vector enable bit is set.

3.The assumed size for each block is software-programmable. It is initialized to its smallest setting at reset.

4.The assumed device type for Block A/B is determined by an external jumper at reset time. It also is available as a status bit and cannot be changed by software.

When the width status bit is cleared, the block’s ROM/Flash is considered to be 16 bits wide, where each Falcon interfaces to 8 bits. In this mode, the following rules are enforced:

a.Only single-byte writes are allowed (all other sizes are ignored).

b.All reads are allowed (multiple accesses are performed to the ROM/Flash devices when the read is for greater than one byte).

When the width status bit is set, the block’s ROM/Flash is considered to be 64 bits wide, where each Falcon interfaces with 32 bits. In this mode, the following rules are enforced:

a.Only aligned, 4-byte writes should be attempted (all other sizes are ignored).

b.All reads are allowed (multiple accesses to the ROM/Flash device are performed for burst reads).

More information about ROM/Flash can be found in the Programming Model section of this chapter.

In order to place code correctly in the ROM/Flash devices, address mapping information is required. Table 3-8shows how PowerPC 60x addresses map to the ROM/Flash addresses when ROM/Flash is 16 bits wide (8 bits per Falcon). Table 3-9shows how they map when Flash is 64 bits wide (32 bits per Falcon).

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Motorola MVME2300 Series manual Functional Description