CPU Control Register

1-30

ISA Local Resource Bus

1-31

W83C553 PIB Registers

1-31

16550 UART

1-31

General-Purpose Readable Jumpers

1-32

NVRAM/RTC and Watchdog Timer Registers

1-32

Module Configuration and Status Registers

1-33

CPU Configuration Register

1-34

Base Module Feature Register

1-35

Base Module Status Register (BMSR)

1-36

Seven-Segment Display Register

1-37

VME Registers

1-37

LM/SIG Control Register

1-38

LM/SIG Status Register

1-39

Location Monitor Upper Base Address Register

1-41

Location Monitor Lower Base Address Register

1-41

Semaphore Register 1

1-42

Semaphore Register 2

1-42

VME Geographical Address Register (VGAR)

1-43

Emulated Z8536 CIO Registers and Port Pins

1-43

Emulated Z8536 Registers

1-43

Z8536 CIO Port Pins

1-44

ISA DMA Channels

1-45

CHAPTER 2 Raven PCI Bridge ASIC

 

Introduction

2-1

Features

2-1

Block Diagram

2-2

Functional Description

2-4

MPC Bus Interface

2-4

MPC Address Mapping

2-4

MPC Slave

2-6

MPC Write Posting

2-8

MPC Master

2-8

MPC Arbiter

2-10

MPC Bus Timer

2-10

PCI Interface

2-10

PCI Address Mapping

2-11

PCI Slave

2-14

PCI Write Posting

2-17

viii

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Motorola MVME2300 Series manual Raven PCI Bridge Asic