Motorola MVME2300 Series manual List of Tables

List of Tables

Table 1-1. Features: MVME2300 Series	1-2
Table 1-2. Default Processor Memory Map	1-8
Table 1-3. CHRP Memory Map Example	1-9
Table 1-4. Raven MPC Register Values for CHRP Memory Map	1-10
Table 1-5. PREP Memory Map Example	1-11
Table 1-6. Raven MPC Register Values for PREP Memory Map	1-12
Table 1-7. PCI CHRP Memory Map	1-13
Table 1-8. Raven PCI Register Values for CHRP Memory Map	1-15
Table 1-9. Universe PCI Register Values for CHRP Memory Map	1-15
Table 1-10. PCI PREP Memory Map	1-16
Table 1-11. Raven PCI Register Values for PREP Memory Map	1-18
Table 1-12. Universe PCI Register Values for PREP Memory Map	1-19
Table 1-13. Universe PCI Register Values for VMEbus Slave Map Example	1-23
Table 1-14. VMEbus Slave Map Example	1-24
Table 1-15. System Register Summary	1-24
Table 1-16. 16550 Access Registers	1-31
Table 1-17. M48T59/559 Access Registers	1-33
Table 1-18. Module Configuration and Status Registers	1-33
Table 1-19. VME Registers	1-38
Table 1-20. Emulated Z8536 Access Registers	1-43
Table 1-21. Z8536 CIO Port Pin Assignments	1-44
Table 2-1. Features of the Raven ASIC	2-1
Table 2-2. Command Types — MPC Slave Response	2-7
Table 2-3. MPC Transfer Types	2-9
Table 2-4. Command Types — PCI Slave Response	2-15
Table 2-5. PCI Master Command Codes	2-18
Table 2-6. Address Modification for Little-Endian Transfers	2-27
Table 2-7. Raven MPC Register Map	2-31
Table 2-8. Raven PCI Configuration Register Map	2-48
Table 2-9. Raven PCI I/O Register Map	2-49
Table 2-10. RavenMPIC Register Map	2-69
Table 3-1. Features of the Falcon Chip Set	3-1
Table 3-2. PowerPC 60x Bus to DRAM Access Timing — 70ns Page Devices	3-7
Table 3-3. PowerPC 60x Bus to DRAM Access Timing — 60ns Page Devices	3-8

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