Intel 440GX manual

Contents

Main 440GX AGPset Design Guide Contents Page Page Page Figures Tables Page Page Page Page Introduction 1.1 About This Design Guide 1.2 References 1.3 Intel Pentium II Processor / Intel 440GX AGPset Overview 1.3.1 Intel Pentium II Processor 1.3.2 Intel 440GX AGPset 1.3.2.1 System Bus Interface 1.3.2.2 DRAM Interface 1.3.2.3 Accelerated Graphics Port Interface 1.3.2.4 PCI Interface 1.3.2.5 System Clocking 1.3.3 PCI-to-ISA/IDE Xcelerator (PIIX4E) 1.3.4 Wired for Mana g ement Initiative 1.3.3.1 Instrumentation 1.3.3.2 Remote Service Boot 1.3.3.3 Remote Wake-Up 1.3.3.4 Power Management 1.4 Design Recommendations 1.4.1 Voltage Definitions 1.4.2 General Design Recommendations 1.4.3 Transitioning from Intel 440BX AGPset to Intel 440GX AGPset Design Page Page Page Motherboard Layout and Routing Guidelines 2.1 BGA Quadrant Assignment Page 2.2 Board Description Page 2.3 Routing Guidelines 2.3.1 GTL+ Description 2.3.2 GTL+ Layout Recommendations 2.3.3 Single Processor Design 2.3.3.1 Single Processor Network Topology and Conditions 2.3.3.2 Single Processor Recommended Trace Lengths 2.3.4 Dual Processor Systems 2.3.4.1 Dual Processor Network Topology and Conditions 2.3.4.2 Dual Processor Recommended Trace Lengths 2.3.5 Single Processor SystemsSingle-End Termination (SET) 2.3.5.1 Set Network Topology and Conditions 2.3.5.2 SET Trace Length Requirements 2.3.6 Additional Guidelines 2.3.6.1 Minimizing Crosstalk 2.3.6.2 Practical Considerations 2.3.7 Design Methodology 2.3.8 Performance Requirements 2.3.9 Topology Definition 2.3.10 Pre-Layout Simulation (Sensitivity Analysis) 2.3.11 Simulation Methodolo gy 2-14 2.4 Placement & Layout 2.5 Post-Layout Simulation Figure 2-13. Pre-layout simulation process DUAL KLAMATH PROCESSOR CARD SOLUTION SPACE Rt = 56 +/- 5% DUAL KLAMATH FLIGHT TIME 2.6 Validation 2.6.1 Flight Time Measurement 2.6.2 Signal Quality Measurement + + + + + + 2.7 Timing Analysis The terms used in the equations are described in Tabl e 2-8. Table 2-7. Intel Pentium II Processor and Intel 440GX AGPset System Timing Equations TTTTTT + + + Page 2.8 AGP Layout and Routing Guidelines 2.8.1 AGP Connector (Up Option) Layout Guidelines 2.8.2 On-board AGP Compliant Device (Down Option) Layout Guidelines Page 2.9 82443GX Memory Subsystem Layout and Routing Guidelines 2.9.1 100 MHz 82443GX Memory Array Considerations 2.9.1.1 Matching the Reference Planes 2.9.1.2 Adding Additional Decoupling Capacitor 2-24 2.9.1.3 Trace Width vs. Trace Spacing Group 0 Group 1 2.9.2 Memory Layout & Routing Guidelines Figure 2-18. Matching the Reference Planes and Adding Decoupling Capacitor Figure 2-19. 4 DIMMs (Single or Double-Sided) 82443GX Page Page Page Page 2.9.3 4 DIMM Routing Guidelines [NO FET] 2.9.4 PCI Bus Routing Guidelines 2.9.5 Decoupling Guidelines: Intel 440GX AGPset Platform 82443GX Host Brid g e Controller 492 BGA 2.9.6 Intel 440GX AGPset Clock Layout Recommendations 2.9.6.1 Clock Routing Spacing 2.9.6.2 System Bus Clock Layout 2.9.6.3 PCI Clock Layout 2.9.6.4 SDRAM Clock Layout 2.9.6.5 AGP Clock Layout Page Page Design Checklist 3.1 Overview 3.2 Pull-up and Pull-down Resistor Values 3-2 3.3 Intel Pentium II Processor Checklist 3.3.1 Intel Pentium II Processor Figure 3-1. Pull-up Resistor Example IOLMAX VIL MAX Table 3-1. Slot Connectivity (Sheet 2 of 3) 3-4 Table 3-2. GND & Power Pin Definition Table 3-1. Slot Connectivity (Sheet 3 of 3) 3.3.2 Intel Pentium II Processor Clocks 3.3.3 Intel Pentium II Processor Signals Page 3.3.4 Uni-Processor (UP) Slot 1 Checklist 3.3.5 Dual-Processor (DP) Slot 1 Checklist 3.3.6 Slot 1 Decoupling Capacitors 3.3.7 Voltage Regulator Module, VRM 8.2 3.4 Intel 440GX AGPset Clocks 3.4.1 CK100 - 100 MHz Clock Synthesizer 3-9 3.4.2 CKBF - SDRAM 1 to 18 Clock Buffer reduce EMI and power consumption. It is recommended that the BIOS disable unused clocks. considerations. The reference schematics implement an LC filter on the supply pins to reduce noise. 3.5 82443GX Host Bridge 3.5.1 82443GX Interface Table 3-4. 82443GX Connectivity (Sheet 1 of 3) 3-11 Table 3-4. 82443GX Connectivity (Sheet 2 of 3) 3.5.2 82443GX GTL+ Bus Interface 3.5.3 82443GX PCI Interface 3.5.4 82443GX AGP Interface 3-14 3.6 Intel 440GX AGPset Memory Interface PC SDRAM Unbuffered DIMM Specification, Rev 1.0, dated Feb 1998 3.6.1 SDRAM Connections Table 3-6. SDRAM Connectivity 3.6.2 DIMM Solution With FET Switches 82443GX 3.6.3 Registered SDRAM 3.7 82371EB (PIIX4E) 3.7.1 PIIX4E Connections Table 3-7. PIIX4E Connectivity (Sheet 1 of 4) 3-17 Table 3-7. PIIX4E Connectivity (Sheet 2 of 4) 3-18 Table 3-7. PIIX4E Connectivity (Sheet 3 of 4) 3-19 V Table 3-7. PIIX4E Connectivity (Sheet 4 of 4) 3.7.2 IDE Routing Guidelines 3.7.2.1 Cabling 3.7.2.2 Motherboard Page 3.7.3 PIIX4E Power And Ground Pins 3.8 PCI Bus Signals 3.9 ISA Signals 3.10 ISA and X-Bus Signals 3.11 USB Interface 3.12 IDE Interface 3.13 Flash Design 3.13.1 Dual-Footprint Flash Design 3.13.2 Flash Design Considerations PIIX4 XD[7:0] AB 3.14 System and Test Signals 3.15 Power Management Signals 3.15.1 Power Button Implementation 3.16 Miscellaneous 3.17 82093AA (IOAPIC) 3.18 Manageability Devices 3.18.1 Max1617 Temperature Sensor 3.18.2 LM79 Microprocessor System Hardware Monitor 3.18.3 82558B LOM Checklist 3.18.4 Wake On LAN (WOL) Header 3.19 Software/BIOS 3.19.1 USB and Multi-processor BIOS 3.19.2 Design Considerations 3.20 Thermals / Cooling Solutions 3.20.1 Design Considerations 3.21 Mechanicals 3.22 Electricals 3.22.1 Design Considerations 3.23 Layout Checklist 3.23.1 Routing and Board Fabrication 3.23.2 Design Consideration 3.24 Applications and Add-in Hardware 3.24.1 Design Consideration Page Page Debug Recommendations 4.1 Slot 1 Test Tools 4.2 Debug/Simulation Tools 4.2.1 Logic Analyzer Interface (LAI) 4.2.2 In-Target Probe (ITP) 4.3 Debug Features 4.3.1 Intel Pentium II Processor LAI Issue Page 4.3.2 Debug Logic Recommendations 4.3.3 Debug Layout 4.3.4 Debug Procedures Page Page Page Third-Party Vendor Information 5.1 Processors 5.1.1 Voltage Regulator Modules 5.1.2 Voltage Regulator Control Silicon 5.2 Intel 440GX AGPset 5.2.1 Clock Drivers 5.2.2 Power Management Components 5.2.3 FET Switches(4 DIMM/FET Design) 5.3 Other Processor Components 5.3.1 Slot 1 Connector 5.3.2 Mechanical Support 5.3.3 Heat sinks 5.3.4 Heat sink attachment: Rivscrews* and associated tools Page Page Intel 440GX AGPset Platform Ref erence Design A