Intel 440GX manual XD70, 1Mbit/2Mbit, 6. nterfacing Intel’s Flash with PIIX4E in Desktop

Design Checklist

Following are general layout guidelines for using the Intel’s boot block flash memories (28F001GX/28F002BC) in the system:

•If adding a switch on VPP for write protection, switch to GND instead of VCC.

•Connect the DU pin of the 2Mbit devices to GND if anticipating to use the Intel SmartVoltage boot block flash memory family in the future.

•Use A16 inversion for 1Mbit devices and A17 inversion for 2Mbit devices to differentiate between recovery and normal modes. For systems needing a 1Mb to 2Mb upgrade path, A16 can be used for both devices alleviating the need for a board redesign.

•Use a 0.01mf - 0.1mf ceramic capacitor connected between each Vcc and GND, and between its Vpp and GND. These high frequency, inherently low inductance capacitors should be placed as close as possible to the package leads.

Figure 3-6illustrates the recommended layout for using Intel’s flash devices in desktop designs.

Figure 3-6. nterfacing Intel’s Flash with PIIX4E in Desktop

				XD[7:0]		+ 1 2 V
	L S 2 4 5
	A	B				1
SD[7:0]						J1
					V p p	2		V c c
				1Mbit/2Mbit		+ 1 2 V
X D I R #	D I R					3
				Flash		0.01uf
						1
X O E #	G				R P #	J2
PIIX4E						2
	1Mbit uses SA16					3
	2Mbit uses SA17		1			0.01uf
						V c c
			J3	S A 1 6 /
S A 1 6 /
			2	S A 1 7	V c c
S A 1 7
			3
M E M W #
				W E #
M E M R #				O E #	D U
B I O S C S #				C E #
	J3					Mode	J1	J2
	Mode	POS
						Program	1-2	1-2
	Recovery		1-2
						PnP	1-2	2-3
	Normal		2-3
						Non-PnP	2-3	x

Simplified 2.7/3V/5V Design Considerations

Following are general layout guidelines for the Intel’s SmartVoltage/Smart 5 boot block flash memory (2/4Mbit BV/B5) in 3V or 5V designs:

•Connect 2.7V, 3V or 5V to VCC and connect 5V or 12V to VPP (program/erase levels) for BV devices.

•Connect 5V only to VCC and connect 5V or 12V to VPP (program/erase levels) for B5 devices.

•If adding a switch on VPP for write protection, switch to GND instead of VCC.

•Connect WP# to VCC, GND, or a general purpose output GPO[x] control signal. This pin should not be left floating. WP# pin replaces a DU pin and is used in conjunction with the VPP and RP# pins, as detailed in the table below, to control write protection of the boot block.

Intel®440GX AGPset Design Guide 3-26