Design Checklist

3.18.4Wake On LAN (WOL) Header

A 3-pin WOL header interconnects the NIC and motherboard, and requires a 5VSB to pin1.

The WOL supports the MP_Wakeup pulse, allowing it to turn on the system via a signal pulse. The LID input on the PIIX4E requires a 16ms debounce signal.

The MP_Wakeup signal, to the PIIX4E LID pin, requires a 5V to 3V translation. NOTE: The LID pin will be configured as an active high signal through BIOS for this specific implementation. If other logic is used for the 5V to 3V translation, make sure BIOS configures the LID pin appropriately.

Maximum current provided by the power supply should be no less than 600mA.

BIOS support for boot-from-LAN (BIOS Boot Spec), if required.

See Wake on LAN* Leader Recommendations (order number 712940)

3.19Software/BIOS

See the Intel® Pentium® Pro Processor BIOS Writers Guide for details regarding the following responsibilities of the BIOS.

The Intel® Pentium® II processor L2 cache must be initialized and enabled by the BIOS.

The BIOS must load the BIOS Update to the Intel® Pentium® II processor as early as possible in the POST during system boot up. The BIOS update signature mechanism should be used to validate that the BIOS Update has been accepted by the processor.

It is recommended that the BIOS implement the minimum update API interface to allow the BIOS Update stored in BIOS to be updated. Of the two Intel-defined update APIs, it is recommended that the full real mode INT15h interface be implemented. An API calling utility and test tool is available for this interface. Contact your local Intel Field Sales representative for a copy.

Before starting a Flash update routine, use the MTRRs to disable caching, or only allow WT mode. This prevents a WBINVD instruction from writing stale data to the Flash memory.

MTRR 6 & 7 must be left unprogrammed and are reserved for Operating System use.

3.19.1USB and Multi-processor BIOS

Initialize the USB function properly in the PIIX4E component, if USB connectors are provided.

Enable USB interrupt routing to one of the IRQ inputs. This should be set to Level Trigger Mode.

When running Virtual-Wire mode, configure this through the I/O APIC. See page 3-10 of the MultiProcessor Specification 1.4.

DP systems must construct an MPS table, see the MultiProcessor Specification 1.4 for details.

Intel®440GX AGPset Design Guide

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Intel 440GX manual Software/BIOS, Wake On LAN WOL Header, USB and Multi-processor Bios

440GX specifications

The Intel 440GX chipset was launched in 1997 as part of Intel's series of chipsets known as the 440 family, and it served as a critical component for various Pentium II and Pentium III-based motherboard architectures. Specifically designed for the second generation of Intel’s processors, the 440GX delivered enhanced performance and supported a range of important technologies that defined PC architectures of its time.

One of the main features of the Intel 440GX was its support for a 100 MHz front-side bus (FSB), which significantly improved data transfer rates between the CPU and the memory subsystem. This advancement allowed the 440GX to accommodate both the original Pentium II processors as well as the later Pentium III chips, providing compatibility and flexibility for system builders and consumers alike.

The 440GX chipset included an integrated AGP (Accelerated Graphics Port) controller, which supported AGP 2x speeds. This enabled high-performance graphics cards to be utilized effectively, delivering many enhanced graphics capabilities for gaming and multimedia applications. The AGP interface was crucial at the time as it offered a dedicated pathway for graphics data, increasing bandwidth compared to traditional PCI slots.

In terms of memory support, the 440GX could address up to 512 MB of SDRAM, allowing systems built with this chipset to run comfortably with sufficient memory for the era’s demanding applications. The memory controller was capable of supporting both single and double-sided DIMMs, which provided versatility in memory configuration for system builders.

Another notable feature of the Intel 440GX was its support for multi-processor configurations through its Dual Processors support feature. This allowed enterprise and workstation computers to leverage the performance advantages of multiple CPUs, making the chipset suitable for business and professional environments where multitasking and high-performance computing were essential.

On the connectivity front, the chipset supported up to six PCI slots, enhancing peripheral device integration and expansion capabilities. It also included integrated IDE controllers, facilitating connections for hard drives and CD-ROM devices.

Overall, the Intel 440GX chipset represented a balanced combination of performance, flexibility, and technology advancements for its time. Its introduction helped establish a foundation for subsequent advancements in PC technology and set the stage for more powerful computing systems in the years to come.