Intel®440GX AGPset Platform Reference Design

82443GX Component (System bus and DRAM Interfaces)

8

This page shows the 82443GX component, System bus and DRAM Interfaces. The 82443GX connects to the lower 32 bits of the CPU address bus and the CPU control signals, and generates DRAM control signals for the memory interface. In this design, the 82443GX is configured to interface to a memory array of 4 DIMMs for a DP design.

The CKBF is also shown on this page. The 82443GX delivers a single SDRAM clock to the CKBF which is a 18 output buffer, with an I2C interface which may be used to disable unused clock outputs for EMI reduction. It outputs 4 clocks to each DIMM socket, and 1 back to the 82443GX for data timings. The last clock is used for the Global Clock Enable (GCKE) logic.

82443GX Component (PCI and AGP Interfaces)

9

This page shows the 82443GX component, PCI and AGP Interfaces. The definition of pin AF3 has been changed from SUSCLK to GX-PWROK. Like PIIX4E PWROK, it is connected to the PWROK logic from the Power Connector page (Page 32). Note the GCLKIN and GCLKOUT trace length requirements on the AGP interface.

82443GX Component (Memory and System Data Bus Interfaces)

10

This page shows the 82443GX component, Memory and System Data Bus Interfaces. GTL_REF signal are also shown on this page. Ideally, the GTL_REF signals should be decoupled separately, and as close as possible to the 82443GX component, but this is not a requirement.

The GCKE shift register circuit is also shown.

FET Switch Component

11 and 12

These FET switches are used for a 4 DIMM memory configuration. 500 ohm series resistors have been added to all of the grounded xA2 input pins.

DIMM Connectors 0, 1, 2 and 3 for the DP 4-DIMM schematics

13-16

These three pages show the DRAM interface connections from the 82443GX to the DRAM array.

The serial presence detect pins are addressed as 1010-000,001,011 respectively. 82443GX strap pull-up/pull-downs will be located on selected MAB# lines. REGE (pin 147) on each DIMM socket should be pulled high to enable registered DIMMs,

PIIX4E Component

17

This page shows the PIIX4E component. The PIIX4E component connects to the PCI bus, dual IDE connectors, and the ISA bus. This reference design supports a subset of the power management features of the PIIX4E.

PIIX4E Component

18

This page shows the PIIX4E component Interrupts, USB, DMA, power management, X-Bus, and GPIO interfaces. Also shown is the CLOCKRUN# pull-down and the external logic needed to handle a power loss condition.

IOAPIC Component

19

This sheet shows the connection for the IOAPIC controller to the various PIIX4E and processor interrupts.

A-2

Intel®440GX AGPset Design Guide

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Intel 440GX manual 82443GX Component System bus and Dram Interfaces
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440GX specifications

The Intel 440GX chipset was launched in 1997 as part of Intel's series of chipsets known as the 440 family, and it served as a critical component for various Pentium II and Pentium III-based motherboard architectures. Specifically designed for the second generation of Intel’s processors, the 440GX delivered enhanced performance and supported a range of important technologies that defined PC architectures of its time.

One of the main features of the Intel 440GX was its support for a 100 MHz front-side bus (FSB), which significantly improved data transfer rates between the CPU and the memory subsystem. This advancement allowed the 440GX to accommodate both the original Pentium II processors as well as the later Pentium III chips, providing compatibility and flexibility for system builders and consumers alike.

The 440GX chipset included an integrated AGP (Accelerated Graphics Port) controller, which supported AGP 2x speeds. This enabled high-performance graphics cards to be utilized effectively, delivering many enhanced graphics capabilities for gaming and multimedia applications. The AGP interface was crucial at the time as it offered a dedicated pathway for graphics data, increasing bandwidth compared to traditional PCI slots.

In terms of memory support, the 440GX could address up to 512 MB of SDRAM, allowing systems built with this chipset to run comfortably with sufficient memory for the era’s demanding applications. The memory controller was capable of supporting both single and double-sided DIMMs, which provided versatility in memory configuration for system builders.

Another notable feature of the Intel 440GX was its support for multi-processor configurations through its Dual Processors support feature. This allowed enterprise and workstation computers to leverage the performance advantages of multiple CPUs, making the chipset suitable for business and professional environments where multitasking and high-performance computing were essential.

On the connectivity front, the chipset supported up to six PCI slots, enhancing peripheral device integration and expansion capabilities. It also included integrated IDE controllers, facilitating connections for hard drives and CD-ROM devices.

Overall, the Intel 440GX chipset represented a balanced combination of performance, flexibility, and technology advancements for its time. Its introduction helped establish a foundation for subsequent advancements in PC technology and set the stage for more powerful computing systems in the years to come.
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