Decoupling Guidelines Intel 440GX AGPset Platform

Motherboard Layout and Routing Guidelines

Because of the specifics of an ATX layout, it is recommended that the PIIX4E component is at the “END” of the PCI bus, as shown in Figure 2-28. This insures proper “termination” of the PCI Bus signals.

Figure 2-28. PCI Bus Layout Example

82443GX

PIIX4E

2.9.5Decoupling Guidelines: Intel® 440GX AGPset Platform

Decoupling caps should be placed at the corners of the 443GX(BGA Package). A minimum of four 0.1uF and four 0.01 uF are recommended. The system bus, AGP, PCI, and DRAM interface can “break-out” from the BGA package on all four sides. Additional caps will also help reduce EMI and cross-talk.

Figure 2-29. 82443GX Decoupling

0.1uF

0.01uF

0.1uF

0.01uF

82443GX

Host Bridge

Controller

492 BGA

0.1uF 0.01uF

v006

Note: There are other discrete components for VTT, GTL Ref Voltages that must be also considered when routing around the 82443GX.

Intel®440GX AGPset Design Guide

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Intel manual Decoupling Guidelines Intel 440GX AGPset Platform, Host Bridge Controller 492 BGA

440GX specifications

The Intel 440GX chipset was launched in 1997 as part of Intel's series of chipsets known as the 440 family, and it served as a critical component for various Pentium II and Pentium III-based motherboard architectures. Specifically designed for the second generation of Intel’s processors, the 440GX delivered enhanced performance and supported a range of important technologies that defined PC architectures of its time.

One of the main features of the Intel 440GX was its support for a 100 MHz front-side bus (FSB), which significantly improved data transfer rates between the CPU and the memory subsystem. This advancement allowed the 440GX to accommodate both the original Pentium II processors as well as the later Pentium III chips, providing compatibility and flexibility for system builders and consumers alike.

The 440GX chipset included an integrated AGP (Accelerated Graphics Port) controller, which supported AGP 2x speeds. This enabled high-performance graphics cards to be utilized effectively, delivering many enhanced graphics capabilities for gaming and multimedia applications. The AGP interface was crucial at the time as it offered a dedicated pathway for graphics data, increasing bandwidth compared to traditional PCI slots.

In terms of memory support, the 440GX could address up to 512 MB of SDRAM, allowing systems built with this chipset to run comfortably with sufficient memory for the era’s demanding applications. The memory controller was capable of supporting both single and double-sided DIMMs, which provided versatility in memory configuration for system builders.

Another notable feature of the Intel 440GX was its support for multi-processor configurations through its Dual Processors support feature. This allowed enterprise and workstation computers to leverage the performance advantages of multiple CPUs, making the chipset suitable for business and professional environments where multitasking and high-performance computing were essential.

On the connectivity front, the chipset supported up to six PCI slots, enhancing peripheral device integration and expansion capabilities. It also included integrated IDE controllers, facilitating connections for hard drives and CD-ROM devices.

Overall, the Intel 440GX chipset represented a balanced combination of performance, flexibility, and technology advancements for its time. Its introduction helped establish a foundation for subsequent advancements in PC technology and set the stage for more powerful computing systems in the years to come.

Contents

Design Guide Intel 440GX AGPset Intel440GX AGPset Design Guide Contents 6.5 Dimm Solution With FET SwitchesSystem Bus Clock Layout 6.3 6.4 82371EB PIIX4E PIIX4E Power And Ground PinsISA and X-Bus Signals Thermals / Cooling Solutions 20.1 Intel440GX AGPset Platform Reference Design IntelPentiumII Processor LAI IssueFET Switches4 DIMM/FET Design Voltage Regulator Control Silicon Solution Space for Single Processor Designs With Single-End Example ATX Placement for a UP Pentium II processorExample NLX Placement for a UP Intel Pentium II processor Solution Space for Single Processor Design Based on Results Motherboard Model MAB12,11,90#, MAB14,13,10, 4 DIMMs TablesIntel Pentium II Processor and Intel 440GX AGPset Intel Pentium II Processor and Intel 440GX AGPset 100 MHz Date Revision Description Revision History Intel440GX AGPset Design Guide Introduction Page About This Design Guide Introduction References Intel Pentium II Processor Intel Pentium II Processor / Intel 440GX AGPset Overview VCR Intel 440GX AGPset Dram Interface System Bus InterfaceAccelerated Graphics Port Interface System Clocking Wired for Management InitiativePCI-to-ISA/IDE Xcelerator PIIX4E PCI Interface Instrumentation Remote Service Boot Remote Wake-Up Power ManagementDesign Recommendations Voltage Definitions General Design Recommendations Introduction Motherboard Design Page BGA Quadrant Assignment Major Signal Sections 82443GX Top View ATX Form Factor NLX Form Factor Board Description Four Layer Board Stack-up Routing Guidelines Single Processor Network Topology and Conditions 1 GTL+ Description2 GTL+ Layout Recommendations Single Processor Design Recommended Trace Lengths for Single Processor Design Single Processor Recommended Trace LengthsTrace Minimum Length Maximum Length Dual Processor Recommended Trace Lengths Dual Processor SystemsSingle Processor Systems-Single-End Termination SET Dual Processor Network Topology and Conditions SET Trace Length Requirements SET Trace Length Requirements Minimizing Crosstalk Additional GuidelinesPractical Considerations Design Methodology 12. GTL+ Design Process Performance Requirements Recommended 100 MHz System Flight Time Specs Topology DefinitionPre-Layout Simulation Sensitivity Analysis Simulation Methodology Post-Layout Simulation Placement & Layout Validation Crosstalk and the Multi-Bit Adjustment FactorFlight Time Measurement Edge Guideline @ Processor Edge Spec @ Processor Core Signal Quality Measurement Term Description Timing Analysis Timing Term Value 10. Recommended 100 MHz System Timing Parameters11. Recommended 100 MHz System Flight Time Specs Timing Term Intel Pentium II Processor Intel 440GX AGPset 12. Data and Associated Strobe AGP Connector Up Option Layout GuidelinesConnector AGP Layout and Routing Guidelines WidthSpace Trace Line Length Line Length Matching 14. Control Signal Line Length RecommendationsOn-board AGP Compliant Device Down Option Layout Guidelines 13. Source Synchronous Motherboard Recommendations Compliant 82443GX Graphics Data Routing Device 16. Control Signal Line Length Recommendations15. Source Synchronous Motherboard Recommendations 1 100 MHz 82443GX Memory Array Considerations 82443GX Memory Subsystem Layout and Routing GuidelinesTo 82443GX MDs & MECCs To DIMM10 DQs To DIMM32 DQs Register Data Control Clock Matching the Reference PlanesAdding Additional Decoupling Capacitor Register Trace Width vs. Trace Spacing Memory Layout & Routing Guidelines Switch 16212 Dimm Module 18. FET Switch DQ Route Example 82443GX Dimm Module 82443GX 0.6 0.4 0.6 0.4 Dimm Module 24. Motherboard Model-DQMB1,5, 4 DIMMs 20. Motherboard Model SCASA#, 4 DIMMs 19. Motherboard Model SRASB#, 4 DIMMs21. Motherboard Model SCASB#, 4 DIMMs 23. Motherboard Model WEB#, 4 DIMMs 22. Motherboard Model WEA#, 4 DIMMs24. Motherboard Model MAA140, 4 DIMMs VCC3 3 4 Dimm Routing Guidelines no FETPCI Bus Routing Guidelines 25. Motherboard Model MAB12,11,90#, MAB14,13,10, 4 DIMMs Host Bridge Controller 492 BGA Decoupling Guidelines Intel 440GX AGPset Platform 014 018 Clock Intel 440GX AGPset Clock Layout RecommendationsClock Routing Spacing System Bus Clock Layout 440GX Ckbf Dlko PCI Clock LayoutSdram Clock Layout Net Trace Length Min Max Cap Net Trace Length Min Max Card Trace AGP Clock Layout Design Checklist Page Pull-up and Pull-down Resistor Values Overview Slot Connectivity Sheet 1 Intel Pentium II Processor ChecklistProcessor Pin Pin Connection Slot Connectivity Sheet 2 Slot Connectivity Sheet 3 GND & Power Pin DefinitionVtt VCC3 Reserved NC Vcc Intel Pentium II Processor Clocks Intel Pentium II Processor Signals Design Checklist Voltage Regulator Module, VRM Uni-Processor UP Slot 1 ChecklistDual-Processor DP Slot 1 Checklist Slot 1 Decoupling Capacitors SEL100/66# Intel 440GX AGPset Clocks1 CK100 100 MHz Clock Synthesizer Processor Frequency Select Gcke and Dclkwr Connection Ckbf Sdram 1 to 18 Clock Buffer 1 82443GX Interface 82443GX Host BridgeGX Connectivity Sheet 1 GX Connectivity Sheet 2 VTTA, Vttb 2 82443GX GTL+ Bus Interface3 82443GX PCI Interface GX Connectivity Sheet 3 4 82443GX AGP Interface Signal Description Register Pulled to ‘0’ Pulled to ‘1’Strapping Options Sdram Connectivity 82443GX Pins/Connection Dimm Pins Pin FunctionIntel 440GX AGPset Memory Interface Sdram Connections Registered Sdram Dimm Solution With FET Switches PIIX4E Connectivity Sheet 1 Signal Names Connection82371EB PIIX4E PIIX4E Connections PIIX4E Connectivity Sheet 2 PIIX4E Connectivity Sheet 3 PIIX4E Connectivity Sheet 4 Motherboard Signal ResistorIDE Routing Guidelines Cabling IDE Reset#PDD150 PDA20 Pin32,34 PIIX4E Power And Ground Pins PCI Bus SignalsPIIX4E PWR & GND 11. Non-PIIX4E ISA Signals ISA SignalsISA and X-Bus Signals 10. Non-PIIX4E PCI Signals IDE Interface USB Interface12. Non-PIIX4E IDE PLCC32 to TSOP40 PLCC32 to PSOP44 PDIP32 to TDIP40 Flash DesignDual-Footprint Flash Design Flash Design Considerations XD70 Write Protection 13. Flash Vpp Recommendations Power Management Signals System and Test Signals VCC3 Power Button Implementation Miscellaneous 17 82093AA Ioapic Manageability Devices 18.1 Max1617 Temperature Sensor18.2 LM79 Microprocessor System Hardware Monitor Pin Number Pin Name Resistor Value Comment 18.3 82558B LOM ChecklistRequired in both a and B stepping designs USB and Multi-processor Bios Software/BIOSWake On LAN WOL Header Mechanicals Thermals / Cooling SolutionsDesign Considerations Electricals Design Consideration Layout ChecklistApplications and Add-in Hardware Routing and Board Fabrication Debug Recommendations Page In-Target Probe ITP Slot 1 Test ToolsDebug/Simulation Tools Logic Analyzer Interface LAI 4 I/O Buffer Models Debug FeaturesIntel Pentium II Processor LAI Issue Bus Functional Model BFM 150 ohm 150 330 ohmKohm 430 ohm A20M# 150 330 ohm Debug Logic RecommendationsPICD0# 150 ohm PICD1# Design Considerations Debug ProceduresDebug Layout Debug Considerations Debug Recommendations Third Party Vendors Page Supplier Contact Phone Slot 1 ConnectorProcessors GTL+ Bus Slot 1 Terminator Cards Voltage Regulator Control Silicon Vendors Voltage Regulator ModulesVoltage Regulator Control Silicon Voltage Regulator Modules Clock Drivers Power Management ComponentsFET Switches4 DIMM/FET Design Intel 440GX AGPset Other Processor Components Reference Design Schematics Page Intel 440GX AGPset Platform Reference Design 82443GX Component System bus and Dram Interfaces VRM Power Connectors Front Panel Jumpers