System and Test Signals, Power Management Signals

Design Checklist

Figure 3-7. Interfacing Intel’s Flash with PIIX4E in Desktop

SD[7:0]

PIIX4E

S U S A #

G P O [x]

SA[17:0]

M E M W #

M E M R #

B I O S C S #

	SD[7:0]		+ 5 V
			+ 5 V
	DQ[7:0]
			V p p
N.C.	DQ[14:8]
			0 . 0 1 u f
	2/4Mbit
	B V / B 5
	Flash
	R P #		V c c
	W P #		V c c
	W P #
	SA[17:0]		V c c
	W E #		0.01 uf
	W E #
	O E #	B Y T E #
		B Y T E #
	C E #

3.14System and Test Signals

•8.2K ohm pull-up resistor is recommended on the TEST# pin of the PIIX4E.

3.15Power Management Signals

•A power button is required by the ACPI specification.

•PWRBTN# is connected to the front panel on/off power button. The PIIX4E integrates 16msec debouncing logic on this pin.

•All power button logic should be powered using 3VSB.

•PS_POK from the ATX connector goes to AC power loss circuitry. This circuitry allows control of whether the PIIX4E will power up after a power loss or remain off. The PIIX4E defaults to powering up the system, which may cause system model implementation issues. This circuit allows the user/BIOS to determine what will happen when a system is plugged in. See PIIX4E Application Note #7, System Power Control, for details.

•It is highly recommended that the PS_POK signal from the power supply connector not be connected directly to logic on the board without first going through a Schmitt trigger input to square-off and maintain its signal integrity.

•PS_POK logic from the power supply connector can be powered from the core voltage supply.

•RSMRST# logic should be powered by a standby supply, making sure that the input to the PIIX4E is at a 3V level. The RSMST# signal requires a minimum time delay of 1 millisecond from the rising edge of the standby power supply voltage. A Schmitt trigger circuit is recommended to drive the RSMRST# signal. To provide the required rise time, the 1 millisecond delay should be placed before the Schmitt trigger circuit. The reference design implements a 20ms delay at the input of the Schmitt trigger to ensure the Schmitt trigger inverters have sufficiently powered up before switching the input. Also ensure that voltage on RSMRST# does not exceed VCC(RTC). Refer to schematics for implementation details. If

Intel®440GX AGPset Design Guide

3-28

440GX specifications

The Intel 440GX chipset was launched in 1997 as part of Intel's series of chipsets known as the 440 family, and it served as a critical component for various Pentium II and Pentium III-based motherboard architectures. Specifically designed for the second generation of Intel’s processors, the 440GX delivered enhanced performance and supported a range of important technologies that defined PC architectures of its time.

One of the main features of the Intel 440GX was its support for a 100 MHz front-side bus (FSB), which significantly improved data transfer rates between the CPU and the memory subsystem. This advancement allowed the 440GX to accommodate both the original Pentium II processors as well as the later Pentium III chips, providing compatibility and flexibility for system builders and consumers alike.

The 440GX chipset included an integrated AGP (Accelerated Graphics Port) controller, which supported AGP 2x speeds. This enabled high-performance graphics cards to be utilized effectively, delivering many enhanced graphics capabilities for gaming and multimedia applications. The AGP interface was crucial at the time as it offered a dedicated pathway for graphics data, increasing bandwidth compared to traditional PCI slots.

In terms of memory support, the 440GX could address up to 512 MB of SDRAM, allowing systems built with this chipset to run comfortably with sufficient memory for the era’s demanding applications. The memory controller was capable of supporting both single and double-sided DIMMs, which provided versatility in memory configuration for system builders.

Another notable feature of the Intel 440GX was its support for multi-processor configurations through its Dual Processors support feature. This allowed enterprise and workstation computers to leverage the performance advantages of multiple CPUs, making the chipset suitable for business and professional environments where multitasking and high-performance computing were essential.

On the connectivity front, the chipset supported up to six PCI slots, enhancing peripheral device integration and expansion capabilities. It also included integrated IDE controllers, facilitating connections for hard drives and CD-ROM devices.

Overall, the Intel 440GX chipset represented a balanced combination of performance, flexibility, and technology advancements for its time. Its introduction helped establish a foundation for subsequent advancements in PC technology and set the stage for more powerful computing systems in the years to come.

Intel 440GX manual System and Test Signals, Power Management Signals

Models: 440GX